LPC4367JET256 ADC0_0 offset

[thomasstegmeije]

Hi,

We are using the LPC4367JET256 in a new design, we are using the dedicated ADC pins. 

ADC0_1 to ADC0_7 work perfectly but ADC0_0 has a offset. 

The ADC are driven by a op-amp followed with a resistor divider ( 56K and 100K) and a 2.7nF capacitor on the ADC pins. The ADC sample fequency is low. 

When the output of the op-amp is 0V the ADC0_0 measures ~0.3V, when measuring the voltage on the ADC pin it is 0.3V. 

So there is a 0.3V voltage drop across the series resistor, but current is sourced by the LPC43. 

ADC0_0 is the only DAC pin so we thought this may be enabled, but disabling the DAC does not work either. 

Does anyone have an idea why the LPC4367 sources on the dedicated ADC0_0/1_0 pin?

[Carlos_Mendoza]

Hi Thomas,

Are you using the ADC1_0 channel? Please notice that the ADC0_0/ADC1_0/DAC pins are physically connected to the same pad, so you may be seeing a signal coming from the ADC1_0 channel.

Best Regards,
Carlos Mendoza
Technical Support Engineer

[thomasstegmeije]

Hello Carlos,

We don't use ADC1_0, PC_3 where ADC1_0 also can be used on is used a a GPIO. 

P4_3 where ADC0_0 also can be used on is used as LCD_VD2. 

I did some testing with only a 100K pull down on the ADC0_0/ADC1_0 pin:

Normal running mode: 0.7V

Reset: 1.5V. 

It seems that there is some weak pull-up on this pin. 

[Carlos_Mendoza]

Hi Thomas,

I have tested on my side using the LPC43S67 Expresso board and can't see any offset on the ADC 0 channel 0, I did the test using the misc_trimpot demo, could you try using the demo on your side and see if you still see the  offset voltage?

LPCOpen Software for LPC43XX|NXP 

Best Regards,
Carlos Mendoza
Technical Support Engineer

[gertjanrocks]

Hello Carlos,

I'm a colleague of Thomas and did the test using the LPCXpresso4367 board. I changed the demo project to use ADC channel 0. When I connect a 100k resistor between the ADC0_0 channel and GND I see a ADC value around 57. When I connect the ADC channel directly to GND the ADC value is as expected 0.

Best Regards,

Gertjan Rocks 

[Carlos_Mendoza]

Hi Gertjan Rocks ,

I have tested it on my side and the ADC0_0 is reading 0xC when connecting a 100K ohm resistor to GND. The 0x57 reading you get its quite high, was there any other modification to the project? Do you have another LPCXpresso4367 board where you can test it?.

Best Regards,
Carlos Mendoza
Technical Support Engineer

[thomasstegmeije]

Hello Carlos,

We seem to have found the problem. 

In some situations our circuitry could put 3.5V instead of 3.3V on the ADC channels 0,1,2 and 3 when these inputs where floating. 

When we have grounded channel 0 and have one of the channels 1,2 and 3 floating (and thus 3.5V on the ADC pin) the reading of channel 0 is influenced. Actually a voltage can be measured on the pin of channel 0. 

This only happens with channel 0

As the analog input specification is 0-VDDA, we used the LPC out of spec when those inputs where floating. 

So I dont think it is a problem with the LPC4367 although it is a bit weird it only happens on channel 0. 

Probaply due to some internal circuitry with the DAC. 

We have a fix that makes sure the inputs can't get higher than VDDA so the problem should be resolved. 

Thank you for your support

[Carlos_Mendoza]

Hi Thomas,

Thanks for your response and information, it is good to hear you have found the problem. The effect of having a higher voltage on one of the ADC pins is a reduced accuracy of measurement on all other ADC channels. This is caused by leakage of the overdriven input via the ADC channel multiplexer. This effect starts early at 100 mV above VDD (if I remember correctly), so better don't allow any overvoltage at all.

Best Regards!
Carlos Mendoza
Technical Support Engineer

[Carlos_Mendoza]

Hi Gertjan Rocks ,

I will check this on my side and will get back to you as soon as possible.

Best Regards,
Carlos Mendoza
Technical Support Engineer