LPC4357 (with LPCOpen): Splitting code between off-chip ROM and on-chip IROM

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LPC4357 (with LPCOpen): Splitting code between off-chip ROM and on-chip IROM

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by AlexMSmithCA on Thu Jun 05 00:47:22 MST 2014
Hi,

I have been looking around and haven't found an answer that I was able to use.  I have a monolithic piece of code (web pages stored as byte code in an array) that I want to off-load to a 4MB external flash chip (SPIFI) since it does not fit within the two 512kB on-chip flash.  I'm using uVision 4 and right now I have it set up so that the on-chip IROM1 is my start-up location, and I just try to shift over the web code to the ROM1 off-chip memory.  When I run it, I get "Cannot access memory" and it seems that all of the off-chip memory cannot be accessed.

I have not worked with embedded devices too much, and am not sure if this is a clocking issue, or if the code can only be stored in one block of memory, or what it might be.

If I put everything within the off-chip memory the program runs fine, albeit slower.  If I put it all on the on-chip memory (minus the web pages), it also works fine.  It seems only when I try to split the code between the two I run into issues.

Any help is greatly appreciated!  I can also provide more information, just tell me where to look.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by AlexMSmithCA on Fri Jun 06 11:49:08 MST 2014
Update:

Fixed.  The splitting actually worked fine, but I had not properly initialized my external memory.  For anybody that runs into this issue in the future, I used LPCOpen v2.15's SPIFILib example to help me.

.\lpcopen\applications\lpc18xx_43xx\keil_uvision_projects\keil_mcb_4357\keil_mcb_4357_spifilib_examples.uvmpw

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by AlexMSmithCA on Fri Jun 06 04:16:01 MST 2014
Addition:

It would be nice to be able to use the built-in tools in uVision to accomplish this.  Here is what I am doing, and the result I get:

- Setting up memory areas in the Options -> Target area.  In particular, start-up via IROM1.

[img]http://www.lpcware.com/system/files/target%20panel2.PNG[/img]

- Have Options -> Linker use the Memory Layout from the Target tab.

[img]http://www.lpcware.com/system/files/linker.PNG[/img]

- Assign a particular file (Web.c)'s code to be loaded into the ROM1 (external ROM via SPIFI).

[img]http://www.lpcware.com/system/files/set%20web.PNG[/img]

- I get lots of "Cannot access Memory" issues when using the debugger.

[img]http://www.lpcware.com/system/files/No%20memory.PNG[/img]
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by AlexMSmithCA on Fri Jun 06 04:09:29 MST 2014
Thank you for the example.  It seems I am still having some issues where my program crashes when the SPIFI memory is accessed.

I have it set up so that everything, except one file (Web.c which contains only static const and const arrays), is loaded onto on-chip ROM and RAM, and the Web.o is placed in the SPIFI chip.

My .sct file is attached, which lets me do this.  However, when I access anything stored on the SPIFI I get a hard fault.  Accessing anything on the chip works perfectly fine.  Note that the 'Unable to access memory' issue is no longer present.

Also attached is the 'Target' panel from uVision's 'Target Options' screen.

Any idea what might be happening?

It is still the case that if I put everything on the external ROM/internal RAM it runs perfectly fine.  And if I do the internal ROM/internal RAM, it works.  Its only if I try to do both internal and external ROM that I have issues.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Thu Jun 05 14:25:00 MST 2014
Hi AlexMSmithCA,
Please find attached an example attached in this post based on Keil UVision. There are many target in this project. To see code spilt between SPIFI and inter flash please use target LPC4357SPIFI_iFLASH.
Please check linker scatter file which places code in different memories.
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