LCD DMA FIFOs cascading: is it automatically preset in single panel mode?

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LCD DMA FIFOs cascading: is it automatically preset in single panel mode?

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michelesponchia
Contributor II

Hi, LPC4357 gurus!

I am working on a new project using your lovely LPC4357 and I am checking if there is a way to increase the LCD refresh rate of my -rather challenging- 800 x 480 x 24bit LCD display.

From the LPC4357 user manual 29.7.2 "Dual DMA FIFOs and associated control logic", first paragraph:

The pixel data accessed from memory is buffered by two DMA FIFOs that can be
independently controlled to cover single and dual-panel LCD types. Each FIFO is 16
words deep by 64 bits wide and can be cascaded to form an effective 32-Dword deep
FIFO in single panel mode.

I am wondering if, when in single panel mode:

  • the LCD FIFOs are automagically cascaded -no further settings needed
  • or if there is some bit -into some control register- to set to force the LCD FIFOs cascading, because it isn't enabled when setting the single panel mode

I am really hoping the cascading isn't automatic when in single panel mode so there would be a way to force the cascading and get a double length FIFO, which in turn could be very useful to increase the LCD refresh rate!

Many thanks for your help!

Michele

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jeremyzhou
NXP Employee
NXP Employee

Hi michele sponchiado,

Thank you for your interest in NXP Semiconductor products and 
for the opportunity to serve you.

Two 16 words deep by 64 bits wide FIFOs will be cascaded to form an effective 32-Dword deep
FIFO in single panel mode automatically.

And the LPC4357 doesn't contain the LCD controller module, so you need to consider other replacements.
pastedImage_1.png

Have a great day,
TIC

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michelesponchia
Contributor II

Hi, I wonder if some guru from NXP can check the previous question.

From the documentation, it is  not really clear if the FIFO cascade mode auto-activates when in single panel mode, and I would like some confirmation about it; if there is some hidden setup to activate the cascading, this means I could drive the LCP panel with a bigger pixel frequency!

Best regards

Michele

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jeremyzhou
NXP Employee
NXP Employee

Hi michele sponchiado,

Thank you for your interest in NXP Semiconductor products and 
for the opportunity to serve you.

Two 16 words deep by 64 bits wide FIFOs will be cascaded to form an effective 32-Dword deep
FIFO in single panel mode automatically.

And the LPC4357 doesn't contain the LCD controller module, so you need to consider other replacements.
pastedImage_1.png

Have a great day,
TIC

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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michelesponchia
Contributor II

Hi, jeremyzhou!

Many thanks for your help!

About your statement: And the LPC4357 doesn't contain the LCD controller module, so you need to consider other replacements.

The LPC4357 chip really contains the LCD controller module, we already used it in a very successful project two years ago. Please check your own website from LPC4357FET256|ARM Cortex-M4/M0|32-bit MCU|NXP 

where it states:LCD controller with dedicated DMA controller and a selectable display resolution.

Best regards

Michele

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jeremyzhou
NXP Employee
NXP Employee

Hi michele sponchiado,

Thanks for your reply.

Yes, you're right, and I had already reported this typo to Document team for checking.

Have a great day,
TIC

 

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