Insufficient FIFO capacity

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Insufficient FIFO capacity

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yigithan
Contributor I

Hi, i have a LPC1758 microcontroller. I want to send 480 bit data in one time with SPI, if i send the datas discrete time the datas disappearing. In user manuel describtion i can send 128 bit data one time as follows

• 8 frame FIFOs for both transmit and receive.
• 4 to 16 bit data frame.

How can I send 480 bits of data at once?

Thanks for solutions.

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3 Replies

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I suppose that you use SPI module of LPC1768 to transfer data as a master.

Pls refer to chapter Chapter 17: LPC176x/5x SPI in UM10360.

You can connect the SCK, MOSI, MISO and any GPIO pins to the slave SPI, connect the GPIO to select slave pin, connect the SCK, MOSI, MISO to slave spi one by one.

After you initialize and configure the spi of LPC1768 in master mode, then you can clear the GPIO(GPIO pin is set up in output mode), then write the SPI data register in either 16 bits or 8 bits, then check the flag bit SPIF in spi status register, after the bit is set, write another data to spi data register, then check flag bit SPIF in spi status register, after the bit is set, write another data to spi data register....., you can set the GPIO pin until all 480 bits data have transferred.

The above method is using polling mode, You can also use interrupt mode to transfer data.

I suppose that we have spi example in the LPCOPEN, pls refer to it.

https://www.nxp.com/design/microcontrollers-developer-resources/lpcopen-libraries-and-examples/lpcop...

I suppose that what you said "send 480 bit data in one time" means that the /SS pin of slave keeps  LOW during the time you transfer 480 bits. In the case, it is not related to the spi data FIFO deepness.

Hope it can help you

BR

XiangJun Rong

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543 Views
yigithan
Contributor I

Thanks for your response,

I am using SSP1 and LPC1758 working on master mode.

I have 4 slave device and have to send 480 bits for each one, when i sent the 480 bits for first slave after than i am gonna choose the second slave.. After than send the all datas for first slave, i am gonna make latch the datas, If i send bits like the user manuel(8x16), i have to send the datas a few time, in this case my datas are disappearing(Because I send the data in 128-bit form, the ssel pin goes up and down a few times until it reaches 480). Since this is a hardware SPI, I can't interfere with the SS pin.

In this case is it possible to add data to fifo queue as data is sent ? or how can i do this? 

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521 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Okay, I see that you use SSP1 module to generate SPI timing to communicate with 4 slave spi modules.

Because you do not have 4 ssel pins to select 4 SPI slave modules, I suppose that you can use general GPIO pins(the GPIO is configured as GPIO output mode). For example, you can use 4 GPIO pin, GPIO0 is connected to SS0, GPIO1 is connected to SS1,...

When you communicate with SS0, just clear GPIO0, while set the other GPIO pins, you can use polling or interrupt mode to communicate with slave spi, after all data has been transferred, set the GPIO0. In the case, you do not need to care about the SSEL pin which id driven by master SSP.

Hope it can help you

BR

XiangJun Rong

 

 

 

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