Hello,
I have an LPC546 and I am trying to prevent reading the code trough SWD and ISP while keeping the mass erase available.
I have tried ECRP value 0x00015800 which prevents reading the code, but also prevents mass erase trough ISP.
Which makes sense because it blocks all ISP and SWD.
Then I tried ECRP value 0x0002A800 which will allow access trough SWD and ISP. But does not prevent reading the code trough SWD.
Reading UM10912 revision 2.4 chapter 5.4.5.4 ISP Write to RAM.
In Table 17 it says:
This command is used to download data to RAM. This command is blocked when code read protection levels 2 or 3 are enabled. Writing
How do I enable code read protection levels 2 or 3 on a LPC546?
Because I can not find this in chapter 43.
Solved! Go to Solution.
It seems SWD is able to read a read protected part.
But ISP can not read it.
Using 0x0001A800 will read protect the part.
Allow ISP and block SWD.
It seems SWD is able to read a read protected part.
But ISP can not read it.
Using 0x0001A800 will read protect the part.
Allow ISP and block SWD.
Hi,
I do not think that there is clear definition about the protection level 2 or 3, the protection level is combination of the ECRP defined in image and the OTP(One-Time Programmable).
Pls refer to Chapter 45: LPC5460x One-Time Programmable (OTP)
memory and API.
Pls refer to Chapter 42: LPC5460x Enhanced Code Read Protection
(ECRP).
Pls refer to Chapter 3: LPC546xx Boot process
Hope it can help you
BR
XiangJun Rong
I figured the information from another part has managed to get into the user manual of the LPC546.
Because level 2 and 3 are defined for other parts for example the LPC18.