Problems with SPI over DMA

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Problems with SPI over DMA

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913 次查看
adithyakirank
Contributor I


Hi,


I am using a Kinetis KM34Z128AXXX5 to write SPI data over DMA. The SPI and DMA have been setup correctly as far as my understanding goes, but there is no data on the SPI lines when I check with an oscilloscope. The SPI and DMA code is as below:

 

 

SE_INT08U data[4] = { 0xAA,0xAA,0xAA,0xAA };

 

#define SPI_MODULE_CUSTOM_CONFIG                                               \

(tSPI){                                                                        \

/* C1   */ CLR(SPI_C1_SPIE_MASK)|SET(SPI_C1_SPE_MASK)|CLR(SPI_C1_SPTIE_MASK)|  \

/* ..   */ SET(SPI_C1_MSTR_MASK)|CLR(SPI_C1_CPOL_MASK)|CLR(SPI_C1_CPHA_MASK)|  \

/* ..   */ CLR(SPI_C1_SSOE_MASK)|CLR(SPI_C1_LSBFE_MASK),                       \

/* C2   */ CLR(SPI_C2_SPMIE_MASK)|CLR(SPI_C2_SPIMODE_MASK)|                    \

/* ..   */ SET(SPI_C2_TXDMAE_MASK)|CLR(SPI_C2_MODFEN_MASK)|                    \

/* ..   */ CLR(SPI_C2_RXDMAE_MASK)|CLR(SPI_C2_SPISWAI_MASK)|                   \

/* ..   */ CLR(SPI_C2_SPC0_MASK),                                              \

/* C3   */ 0,   /* C3 is not used for SPI0 module due to no FIFO support */    \

/* BR   */ SET(SPI_BR_SPPR(0))|SET(SPI_BR_SPR(2)),                             \

/* ML   */ 0,                                                                  \

/* MH   */ 0,                                                                  \

}

 

SPI0_Init( SPI_MODULE_CUSTOM_CONFIG, NULL, 0, NULL);

 

DMA_InstallCallbackDMA0( PRI_LVL3, &dma_cb );

 

DMA0_Init(DMA_CH_SWTRG_M2P_CN_CONFIG(data,DMA_SIZE8BIT,0x40075006,4)); 

 

while(DMA_IsDone(DMA0));

 

 

// Callback for DMA

void dma_cb(DMA_CH_CALLBACK_TYPE type)

{

    if( type == DONE_CALLBACK )

    {

     

    }

}

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1 解答
634 次查看
MarMi
NXP Employee
NXP Employee

Hi Kiran,

I think the issue is in using "continuous" DMA transfer instead of a "cycle steal" one. The DMA configuration structure that should be used is DMA_CH_HWTRG_M2P_CS_CONFIG(..). The cycle steal transfer performs just one transfer for every DMA request.

The SP1 TX operation over DMA is shown in the attached example - SPI1 was selected because of PTF6/SPI1_MOSI is easily accessible for monitoring on TWR-KM34Z50M.

Kind regards,

Martin M.

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2 回复数
634 次查看
adithyakirank
Contributor I

Thanks Martin! That did it for me. I had tried the DMA_CH_HWTRG_M2P_CS_CONFIG configuration earlier but I guess my overall setup was wrong somewhere ( I suspect the SPI TXDMAE bit ). 

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635 次查看
MarMi
NXP Employee
NXP Employee

Hi Kiran,

I think the issue is in using "continuous" DMA transfer instead of a "cycle steal" one. The DMA configuration structure that should be used is DMA_CH_HWTRG_M2P_CS_CONFIG(..). The cycle steal transfer performs just one transfer for every DMA request.

The SP1 TX operation over DMA is shown in the attached example - SPI1 was selected because of PTF6/SPI1_MOSI is easily accessible for monitoring on TWR-KM34Z50M.

Kind regards,

Martin M.