I am using the library C:\Freescale\KM256SWDRV_R4_1_5.
The level of the interrupt can be set as PRI_LVL0àPRI_LVL3.
TMR_CH1_Init(TMR_CH_CNTR_EN_CONFIG4(BUS_CLK_DIV8,SEC_CNTR0_INP),
ModValue, 0x0000, 0x0000, ModValue, 0x0000, PRI_LVL3,
&GPTimerEventHander)
I find PRI_8 0f NVIC_IPR2 is set as 0x3 in the CPU register.
2. The interrupt priority of the LPTMR Timer is also set as PRI_LVL3 in my source code.LPTMR_InstallCallback (PRI_LVL3, (LPTMR_CALLBACK)lptmr_callback);
I find PRI_30 0f NVIC_IPR7 is set as 0x3 in the CPU register.
I want to know whose priority is higher between Quad Timer and LPTMR Timer if setting them both as PRI_LVL3. Thank you.