twrk20d50m duplicate wire on J3 (TWRPI - tower plugin connector) mistake?

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twrk20d50m duplicate wire on J3 (TWRPI - tower plugin connector) mistake?

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Tonkabot
Contributor III

Hi,

  I have just designed a new tower plug-in module to help prototype a zigbee design, and I noticed that in the TWRK20D50M_SCH.PDF schematic, connector J3 has pin 11 labeled as 'PTD4_EBI_AD2/DSPI0_PCS1/FTM0_CH4' and SPI0_CS1_B, and it also has pin 20 labelled as 'PTD4_EBI_AD2/DSPI0_PCS1/FTM0_CH4' and UART0_RTS.  (Yes the long names are the same!)

I checked my tower board (TWR-K20D50M) and pin11 is connected to pin 20.

This seems to be a mistake. 

the pin-out listed in the TWRK20D72 user manual, and in other places, shows the following for the general purpose tower plug-in

(in the TWR schematic J10 and J3 are  the TWRPI, instead of J4 and J5 below)

General Purposes TWRPI Socket Pinout.jpg

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CJarvis
NXP Employee
NXP Employee

The pin PTD4 on the MK20DX128VLH5 MCU can be configured as either a SPI Slave Select or a UART RTS signal (among other pin mux setting).  The connections are "technically" correct, but cause a limitaion that only one interface (SPI or UART w/ Flow Control) can be used on the TWRPI.

I will discuss with the HW team responsible for the TWR-K20D50M to see if there is a more appropriate pin assignment for any future redesigns.

You will have to be careful that the shared pin is not being incorrection driven or sensed by the non-intended use case (for example, the SS signal being misintepreted when using the pin as a UART RTS).

If you are using a TWRPI that utilizes both the SPI SS and UART RTS (may be a GPIO) then I would recommend isolating the signal (assuming you don't actually need both pin functions) for the non-required use case.

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410件の閲覧回数
CJarvis
NXP Employee
NXP Employee

The pin PTD4 on the MK20DX128VLH5 MCU can be configured as either a SPI Slave Select or a UART RTS signal (among other pin mux setting).  The connections are "technically" correct, but cause a limitaion that only one interface (SPI or UART w/ Flow Control) can be used on the TWRPI.

I will discuss with the HW team responsible for the TWR-K20D50M to see if there is a more appropriate pin assignment for any future redesigns.

You will have to be careful that the shared pin is not being incorrection driven or sensed by the non-intended use case (for example, the SS signal being misintepreted when using the pin as a UART RTS).

If you are using a TWRPI that utilizes both the SPI SS and UART RTS (may be a GPIO) then I would recommend isolating the signal (assuming you don't actually need both pin functions) for the non-required use case.

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dhecker
Contributor I

I realize this is an incredibly old post, but surely the TWR-K20D50M J3 pin 11 was intended to be PTD0/DSPI0_PCS0, and not connected to pin 20?  Without access to DSPI0_PCS0 on the TWRPI connector, the TWR-K20D50M can't be configured as an SPI Slave can it?  If I have a TWRPI device that must be the SPI Master, please share (if there's a way) how I can configure the TWR-K20D50M to be an SPI Slave (using SPI over the TWRPI of course).

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