I have worked with MK60FN1M0. My project worked well. Now I'm trying to adapt my project for MK66FN2M0.
I see from Reference manuals that flexbus in MK60 and Mk66 is configured equally.
I use Flexbus cs0,cs2 and cs4. Cs0 and cs4 work correctly but cs2 does not appear. I see FB_ALE, FB_RW for FB_CS2. But there is no cycles on FB_CS2. I have tried to use PORTC_PCR18(FB_CS2) as GPIO and in such mode pin worked correctly.
I have tried on two circuit boards but result is the same.
Why cs2 does not appear? Why Pin PTC18 works only as GPIO?
Here the code of initialization:
FB_CSPMCR = FB_CSPMCR_GROUP4(1) ;//0x00010000;// cs0 cs2 cs4
//address/Data
PORTB_PCR20=PORT_PCR_MUX(5); //fb_ad[31]
PORTB_PCR21=PORT_PCR_MUX(5); //fb_ad[30]
PORTB_PCR22=PORT_PCR_MUX(5); //fb_ad[29]
PORTB_PCR23=PORT_PCR_MUX(5); //fb_ad[28]
PORTC_PCR15=PORT_PCR_MUX(5); //fb_ad[24]
PORTC_PCR14=PORT_PCR_MUX(5); //fb_ad[25]
PORTC_PCR13=PORT_PCR_MUX(5); //fb_ad[26]
PORTC_PCR12=PORT_PCR_MUX(5); //fb_ad[27]
PORTB_PCR6=PORT_PCR_MUX(5); //fb_ad[23]
PORTB_PCR7=PORT_PCR_MUX(5); //fb_ad[22]
PORTB_PCR8=PORT_PCR_MUX(5); //fb_ad[21]
PORTB_PCR9=PORT_PCR_MUX(5); //fb_ad[20]
PORTB_PCR10=PORT_PCR_MUX(5); //fb_ad[19]
PORTB_PCR11=PORT_PCR_MUX(5); //fb_ad[18]
PORTB_PCR16=PORT_PCR_MUX(5); //fb_ad[17]
PORTB_PCR17=PORT_PCR_MUX(5); //fb_ad[16]
PORTB_PCR18=PORT_PCR_MUX(5); //fb_ad[15]A15
PORTC_PCR0=PORT_PCR_MUX(5); //fb_ad[14]A14
PORTC_PCR1=PORT_PCR_MUX(5); //fb_ad[13]A13
PORTC_PCR2=PORT_PCR_MUX(5); //fb_ad[12]A12
PORTC_PCR4=PORT_PCR_MUX(5); //fb_ad[11]A11
PORTC_PCR5=PORT_PCR_MUX(5); //fb_ad[10]A10
PORTC_PCR6=PORT_PCR_MUX(5); //fb_ad[9]A9
PORTC_PCR7=PORT_PCR_MUX(5); //fb_ad[8]A8
PORTC_PCR8=PORT_PCR_MUX(5); //fb_ad[7]A7
PORTC_PCR9=PORT_PCR_MUX(5); //fb_ad[6]A6
PORTC_PCR10=PORT_PCR_MUX(5); //fb_ad[5]A5
PORTD_PCR2=PORT_PCR_MUX(5); //fb_ad[4]
PORTD_PCR3=PORT_PCR_MUX(5); //fb_ad[3]A3
PORTD_PCR4=PORT_PCR_MUX(5); //fb_ad[2]A2
PORTD_PCR5=PORT_PCR_MUX(5); //fb_ad[1]A1
PORTD_PCR6=PORT_PCR_MUX(5); //fb_ad[0]
//control signals
PORTC_PCR19=PORT_PCR_MUX(6); //fb_TA_b
PORTC_PCR11=PORT_PCR_MUX(5); //fb_rw_b
PORTD_PCR1=PORT_PCR_MUX(5); //fb_cs0_b
PORTD_PCR0=PORT_PCR_MUX(5); //fb_ale
PORTC_PCR18=PORT_PCR_MUX(5); //fb_cs2
PORTC_PCR17=PORT_PCR_MUX(5); //fb_cs4
PORTB_PCR19=PORT_PCR_MUX(5); //fb_oe
PORTD_PCR8=PORT_PCR_MUX(6); //A16
PORTD_PCR9=PORT_PCR_MUX(6); //A17
PORTD_PCR10=PORT_PCR_MUX(6); //A18
PORTD_PCR11=PORT_PCR_MUX(6); //A19
PORTD_PCR12=PORT_PCR_MUX(6); //A20
SIM_SOPT2 |= SIM_SOPT2_FBSL(3);//разрешение обращения к данным
/* Enable the clock to the FlexBus module */
SIM_SCGC7 |= SIM_SCGC7_FLEXBUS_MASK;
Enable the FB_CLKOUT function on PTC3 (alt5 function) */
PORTC_PCR3 = PORT_PCR_MUX(0x5);
FB_CSAR2 = EXT_START_ADDRESS;
/* Enable CS signal */
FB_CSCR2=0;
FB_CSCR2 |= FB_CSCR_EXTS(1)|FB_CSCR_WRAH(3)|FB_CSCR_RDAH(3)|FB_CSCR_PS(1)|FB_CSCR_WS(24)|FB_CSCR_AA_MASK;
FB_CSMR2 = FB_CSMR_BAM(0x1);
FB_CSMR2 |= FB_CSMR_V_MASK;
