Hi,
We are using MK20FX512VMD12 controller in our project.
To save power consumption we are switching into Low Power Mode when no activities need to be performed.
Issue here is I added a 2sec OS time delay after entering deepsleep, but it is taking almost 8times more than the expected, where as the same delay works exactly same as expected in normal mode.
While looking at the reference manual it is mentioned that, LPBOOT bi in flash option register controls the reset value of OUTDIVx values in SIM_CLKDIV1 register.
System Clock Divider Register 1 description says
OUTDIV1 - This field sets the divide value for the core/system clock. At the end of reset, it is loaded with either 0000 or 0111 depending on FTFE_FOPT[LPBOOT]. Also, flash option register is read only, can I assume that LPBOOT bit will be updated by the controller depending on the mode of exit.
But in my code I am setting OUTDIV1 value as 0, will it be overwritten by the controller when it exits from LowPower mode.
Please see https://community.nxp.com/t5/forums/editpage/board-id/kinetis/message-id/61228 for more details.
Regards,
Venkata
