KEAZN8 problem

[fanziyu]

Hi,everyone! I'v got some ploblems with using KEAZN8.

1: I know that SIM_SCGC should be configurated before use ADC module,but the following code will cause dubuging halt on,why? I just want to turn ADC off.

SIM_SCGC &= ~SIM_SCGC_ADC_MASK;

ADC_SC1 |= 0x1F;

2:there is Stop mode of operation in Internal Clock Source Chapter 20 in KEA8RM. What is the meaning of the existence?

Is the code running If the ICS does not provide any MCU clock?

3:In the example :SDK-DRIVER-FRDM-KEA-S32DS. why not wait for PLL Lock?

should I add this code :while((ICS_S&ICS_S_LOCK_MASK) == 0);

void FBI_to_FEI(ICS_ConfigType *pConfig)
{
/* select internal reference clock */
/* select the FLL output as clock source */
ICS_C1 = ICS_C1 | (ICS_C1_IREFS_MASK);
ICS_C1 = (ICS_C1 & ~(ICS_C1_CLKS_MASK));

/* wait for the clock source to be changed */
while((ICS_S & ICS_S_CLKST_MASK));
while(!(ICS_S & ICS_S_IREFST_MASK));

/* now system clock source is FLL output*/
/* clear Loss of lock sticky bit */
ICS_S |= ICS_S_LOLS_MASK;


/* Set core frequency*/
ICS_SetBusDivider(pConfig->bdiv);

/*Core frequency divide by 2 for Bus freq*/
SIM_CLKDIV|=SIM_CLKDIV_OUTDIV2_MASK;
}

Thanks!

[FelipeGarcia · Accepted solution]

Hello,

Please accept my apologies for the late reply. See my answers below:

1. Please try by disabling the channel first and then disable clock. You are trying to modify a register once the module is not being clocked, this is not possible.

2. In STOP mode you can only work with the external or internal reference clock, not the FLL. If your code works or not in STOP mode will depend in which peripherals are you working with.

3. Yes, you should add that line to wait for FLL to lock. Please check FEI mode initialization routine in chapter 20.5.1 of the reference manual.

I hope this helps.

Have a great day,
Felipe

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