K64F PWM (Second level period)


K64F PWM (Second level period)

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Contributor III

Hi all,

I am using K64F and trying to make a PWM with 2 seconds period. Also need to adjust its duty cycle.

The examples in SDK is ns level period FTM PWMs, but I need second level period.

The FTM output compare example can make the 50% duty cycle PWM with second level period, but I am not able change its duty cycle. Any suggestions?

Sample code is appreciated.

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347 次查看
NXP TechSupport
NXP TechSupport

Hi Kevin,

The PWM example use Bus clock by default. It was too fast(60MHz) so that you can not achieve second level period.

You need to select Fixed frequency clock(MCGFFCLK) as the clock source of FTM by FTM0_SC[CLKS].

And you need to divide down the 50MHz external clock to 32552Hz by MCG_C1[FRDIV].

If you set FTM0_MOD=65103 and FTMx_SC[PS]=0, the period will be 2 second.

Figure 5-1. Clocking diagram.png

You can test the pwm_twochannel example in SDK_2.3.1_FRDM-K64F. You can  modify below lines to achieve 1 second period PWM.(I have also attached ftm_pwm_twochannel.c and clock_config.c here. )


The FTM_SetupPwm function can only reduce pwmFreq_Hz to 1Hz, and you can not set to 0.5Hz.

So if you want to achieve 2 second period PWM, you may need to modify FTM0_MOD by yourself.

Best Regards,



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Specialist V

Hi Kevin

I recommend that you simply use the fixed frequency input to a FlexTimer module for generating slow PWMs signals since you will probably have less complications with it.
Attached is a binary for the FRDM-K64F which shows this in operation by generating a 1Hz frequency on PTB18 (J1/1) with 20% mark-space ratio. This is Flex Timer 2 channel 0 clocked from the fixed frequency clock (MCGFFCLK) which is 50MHz oscillator divided by 1024 (48.828kHz). It allows a PWM resolution of 0.002%.
It also generates a number of 1kHz PWM signals on PTC2, PTC3, PTC4, PTC1, PTD4 and PTD5 form various channels of Flex Timer 0 (at various mark-space ratios), showing that other Flex Timers can use the standard (bus) clock at the same time.

Also the fixed frequency clock input has an optional pre-scaler and so the same accuracy and resolution can also be achieved for frequencies down to 0.06 Hz.

Only for frequencies below say 0.0005Hz would benefit from cascading timers.

The Open SDA VCOM has a command line interface at 115200Baud which can be used to view memory and registers in case you need to check any such settings (use the "md" memory display - command in the I/O menu).



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