K64 ADC input clamping - why I do not see it?

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K64 ADC input clamping - why I do not see it?

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JeffLynne
Contributor II

Hi to all!

I have a simple situation with K64F with VREF tied to VDD (3.3VDC). According to specification ADC inputs are internally clamped to both VDD and VSS, so allowed voltage is VDD/VSS+-0.3VDC. All fine here.

But when I apply voltage to ADC pin, through series resistor (e.g. 1k) and increase voltage over 3.6VDC the voltage at ADC pin simply follows input voltage. I was expecting to see ADC pin voltage to reach 3.6VDC and do not increase any more (of course injection current will increase with input voltage increase)

 

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JeffLynne
Contributor II

Both Vdd and Vdda are tied to same power supply source - 3.3VDC. Vref is also connected to the same power supply. Btw, I using this design from years in a commercial product; never had any issue with ADC or anything else.

Now I am designing some analogue circuits for ADC inputs and need to implement over voltage protection of ADC inputs. And while testing different scenarious noticed that even with current limitng resistor for injection current, voltage on MCU pins do not stop at 3.3VDC + Schotky voltage.

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Miguel04
NXP TechSupport
NXP TechSupport

Hi @JeffLynne 

Since you are working out of specs the the functionality of the board could be affected, however, the same pin internally has many voltages "going into" the same node, so this could be causing to not be clamped into the max voltage that you are expecting. I recommend you to protect the pin with a external circuit and please read this application note to see how to limit the injection currents (AN4731, 3.2 Externally limiting injection current).

Best Regards, Miguel.

 

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JeffLynne
Contributor II
Which part of my application is out of specs?
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bobpaddock
Senior Contributor III
Applying 3.6V to a device running on 3.3V.

These internal diodes in any device are not particularly good.
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Miguel04
NXP TechSupport
NXP TechSupport

Hi @JeffLynne 

Could you provide more information? To verify all the connections.

Also, according to the Data Sheet the difference between Vdd and Vdda should be +-100mV, please help me verifying this, otherwise the functionality of the ADC will not be as expected.

Let me know if you have another question.

Best Regards, Miguel.

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