K64 ADC clock (ADCK) frequency

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K64 ADC clock (ADCK) frequency

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tlongeri
Contributor I

Table 30 in the K64F Sub-Family Data Sheet says that ADCK frequency must be between 1 and 18 MHz for modes under 13 bits.

In the K64 Sub-Family Reference Manual, the short conversion time example (section 35.4.4.6.3) uses a bus frequency of 20 MHz and uses the bus clock as ADCK.

If I am understanding everything correctly, this means that the ADCK would be greater than 18 MHz and therefore outside specifications. What gives?

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi tlongeri,

   Thanks for your careful reading.

   No, you still need to refer to the datasheet, make sure the fADCK in the range of 1M to 18Mhz when <=13bit mode.

image.png

Reference manual is just give an example, and that it not accurate.

As the RM normally is the same module content for a lot of kinetis chip, so it may have the wrong content.

Anyway, when you use the related ADC clock, please make sure it meet the datasheet's demand, you can consider the RM give you the calculation method.

Thanks a lot for your understanding.

Best Regards,

Kerry

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi tlongeri,

   Thanks for your careful reading.

   No, you still need to refer to the datasheet, make sure the fADCK in the range of 1M to 18Mhz when <=13bit mode.

image.png

Reference manual is just give an example, and that it not accurate.

As the RM normally is the same module content for a lot of kinetis chip, so it may have the wrong content.

Anyway, when you use the related ADC clock, please make sure it meet the datasheet's demand, you can consider the RM give you the calculation method.

Thanks a lot for your understanding.

Best Regards,

Kerry

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