LS1012A JTAG queries.

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LS1012A JTAG queries.

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estebanvazquez
NXP Pro Support
NXP Pro Support

Hello everyone,

 

Our customer wants to integrate support for the LS1012A on SEGGER J-Link, currently we are working with the FRWY-LS1012A board.

From the J-Link perspective there can be implemented scripts to initialize the CPU performing actions like the ones listed below.

  • Read information from the ROM.
  • Read/Write information on the CPU debug access port (DAP).
  • Read/Write information on the CPU registers.
  • Set specific values on the JTAG pins to perform initialization sequences.

https://wiki.segger.com/J-Link_script_files

 

J-Link also provide basic commands to stablish direct connection with an specific core, on this case the Cortex-A53, however when running this “generic” commands J-Link can read the device ROM and also interact with the DAP, but it fails when trying to halt the CPU, as per our understanding we need to implement a custom J-Link script which performs the corresponding actions for the debug portion of the LS1012A to be initialized.

We noted that the LS1012A is supported by Code Warrior, so we reached you out hoping you could let us know if this CPU needs a specific power on sequence or a register configuration to be debugged through JTAG, or if there are CW sources/ routines that we can use as reference for them to be ported on our J-Link setup, could you please confirm?

It is important to say that we have reviewed the following documents, but we didn’t find any specific sequence for the LS1012A to be debugged through JTAG.

  • Enabling DAP on QorIQ LS1012A (AN5406).
  • Layerscape LS1012A Freeway (FRWY-LS1012A) Board Getting Started Guide.
  • QorIQ LS1012A Data Sheet.
  • QorIQ LS1012A Reference Manual.
  • QorIQ LS1012A Security (SEC) Reference Manual.

 

Any guidance will be highly appreciated,

Thanks, and best regards,

Esteban V.

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yipingwang
NXP TechSupport
NXP TechSupport

Please make sure there is valid RCW on the target board.

Please refer to the attached CodeWarrior initialization file.

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yipingwang
NXP TechSupport
NXP TechSupport

Probably the attached script would be helpful.

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estebanvazquez
NXP Pro Support
NXP Pro Support

Hello @yipingwang ,

 

Thank you very much for your response and sources.

Regarding the LS1012A_FRWY.txt script, I saw that it initializes several LS1012A registers, configuring the SPI, QSPI, DDR, etc.... however at this point I cannot access the LS1012A register map using J-Link I am wondering if I am missing a previous step.

Regarding the IDcode.tcl script, I would like to execute it to compare its output against J-Link when reading the IDcode, could you please explain to me how to execute it?

 

Any guidance will be highly appreciated,

Thanks, and best regards,

Esteban V.

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yipingwang
NXP TechSupport
NXP TechSupport

It is needed to execute IDcode.tcl  in CCS console provided in CodeWarrior.

loading history file ... 4 events added
CodeWarrior Connection Server console display active (Tcl8.4.12 / Tk8.4.12)
Loading CCSAPI Tcl interface (C:/Freescale/CW4NET_v2020.06_test1/Common/CCS/bin/ccstcl.dll)...
Loading Svfburner (C:/Freescale/CW4NET_v2020.06_test1/Common/CCS/bin/svfburner.dll)...
Server listening on port: 41475
0: CC not present
There are no command converters configured
Clients allowed from all hosts
No clients denied
(bin) 5 % source IDcode.tcl

Scanning for available TAPs connected via USB.....

No TAPs found connected via USB

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+
+ Available Remote Connections
+
+ 1 - CodeWarriorTAP - <Specify IP Address>
+ 2 - GigabitTAP - <Specify IP Address>
+
+ x - Exit Script without Changes
+
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Specify connection:
1

Specify IP Address

10.193.20.75

Configuring TAP Interface....

Configured Connection: cwtap : 10.193.20.75


TDO -----
|
* Device 0 IDCODE: 5BA00477 Device: ARM DAP rev 5.x
* Device 1 IDCODE: 06B2001D Device: NXP LS1012A rev 1.x
|
TDI -----


###################################################
#
# configTAP - Redefine TAP interface
#
# scanboard - Scans the target system
# and returns the JTAG IDCode
#
# ir - Loopback test
#
###################################################

(bin) 6 %

 

In CCS, we also could use the following command to connect to the processor then reset and halt the processor.

(bin) 42 % delete all
(bin) 43 % config cc cwtap:10.193.20.75
(bin) 46 % ccs::config_chain {ls1043a dap sap2}
(bin) 47 % ccs::reset_to_debug

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estebanvazquez
NXP Pro Support
NXP Pro Support

Hello @yipingwang ,

 

Thank you for the clarification regarding how to run the script, I realized that on my end I cannot run the code using the CCS terminal because I don’t have a CWTAP, instead I am using the CMSIS-DAP to interact with my device, and I think that the CCS console ins not compatible with this communication mechanism.

However, as per the log you shared the corresponding ID codes for the LS1012A seem to be.

TDO -----
|
* Device 0 IDCODE: 5BA00477 Device: ARM DAP rev 5.x
* Device 1 IDCODE: 06B2001D Device: NXP LS1012A rev 1.x
|
TDI -----

 

And it is important to note that on my J-Link script I can obtain the same ID codes please refer to the output below.

JTAG chain detection found 2 devices:
 #0 Id: 0x5BA00477, IRLen: 04, CoreSight JTAG-DP
 #1 Id: 0x06B2001D, IRLen: 05, PowerPC JTAGC-TAP

 

Moreover, I can read the 0x5BA00477 ID using different J-Link commands so I think that the JTAG communication at this point is correct, I am wondering what I might be missing.

I will continue reviewing the LS1012A_FRWY script that you sent to see if it contains any other important initialization routine that could help me to finish the communication establishment.

Is there any other tool, script, or routine, that I can review from the CW perspective to find the missing dependencies on my J-Link setup?

Could you please let me know which CW modules are called when running the following instructions on the CCS console?

(bin) 46 % ccs::config_chain {ls1043a dap sap2}

 

Any guidance will be highly appreciated,

Thanks, and best regards,

Esteban V.

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yipingwang
NXP TechSupport
NXP TechSupport

You could use CMSIS-DAP in CodeWarrior CCS as the following.

(bin) 42 % delete all
(bin) 43 % config cc cmsisdap
(bin) 46 % ccs::config_chain {ls1043a dap sap2}
(bin) 47 % ccs::reset_to_debug

ccs::config_chain is the basic CCS command, not sure which module it is invoked.

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estebanvazquez
NXP Pro Support
NXP Pro Support

Hello @yipingwang ,

 

I established CSS communication with my LS1012A using the CMSISDAP running the instructions below.

delete all
config cc cmsisdap
ccs::config_chain {ls1020a cmsisdap}
ccs::reset_to_debug
display ccs::get_config_chain

 

However, I am not sure if I did it correctly since I used the ls1020a cmsisdap instead of ls1012a cmsisdap because I got the following error when using the LS1012A CMSISDAP, could you please let me know if I used the correct instructions?

(bin) 21 % ccs::config_chain {ls1012a cmsisdap}
can't read "::ccs::core(ls1012a)": no such element in array

 

At this point I would like to understand which could be the main difference between CodeWarrior and J-Link that allows CW to establish the communication channel.

Aditionally, when reviewing the LS1012A-FRWY board schematic, I noted that the ARM core JTAG signals present on the J9 header are also connected to the K-20 microcontroller, and enabled through a GPIO of this MCU, I understand that the connection is done this way for the ARM core to be handled by the CMSISDAP but I would like to understand if there is needed an special software configuration when directly connecting a JTAG probe (such as J-Link) on the J9 header of the LS1012A-FRWY board, could you please confirm?

 

Any guidance will be highly appreciated,

Thanks, and best regards,

Esteban V.

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yipingwang
NXP TechSupport
NXP TechSupport

Please use the following command for ls1012a.

 ccs::config_chain {ls1043a dap sap2}

 

Please refer to the attached document.

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estebanvazquez
NXP Pro Support
NXP Pro Support

Hello @yipingwang ,

 

Thank you for your response, please note that when using the ccs::config_chain {ls1043a dap sap2}  and then the ccs::reset_to_debug commands, the LS1012A u-boot reboots but the CCS console sends the following error: “LS1043A: Core not responding”, am I doing something wrong?

f01.PNG

 

Regarding the provided firmware and documentation those can be used to update the K20 firmware, however, as our final goal is to connect the JTAG probe on the J9 header of the LS1012A-FRWY board, I was wondering if the following signals could have a conflict between J-Link and the CMSISDAP. For example, the LS1012A-FRWY JTAG TRST_B signal is directly handled by the K-20 and not by the J9 header, could this be an issue for our implementation?

f02.PNG

 

Any guidance will be highly appreciated,

Thanks, and best regards,

Esteban V.

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yipingwang
NXP TechSupport
NXP TechSupport

I suggest you to get a CodeWarrior TAP to do verification on your target board.

I verified the following commands on my board farm LS1012AFRWY, there is no problem.

(bin) 5 % config cc cwtap:10.193.20.75
(bin) 6 % ccs::config_chain {ls1043a dap sap2}
(bin) 7 % ccs::reset_to_debug
(bin) 8 %

Please refer to page 3 in the attached PPT.

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estebanvazquez
NXP Pro Support
NXP Pro Support

Hello @yipingwang ,

 

Thank you very much for your response, I was able to connect to CCS using the CMSIS-DAP of my LS1012A board, the issue that I have been facing with J-Link is that it cannot halt the CPU, as far as I have seen the ccs::reset_to_debug command halts the CPU, Is my understanding correct?

Is there any other CW command which only halts the CPU? At this point I would like to enable the CCS logging using log v and ::ccs::jtag_logging_on and then halt the CPU with to understand how does Code Warrior performs this action and check if there is something missing on my J-Link script.

 

Any guidance will be highly appreciated,

Thanks, and best regards,

Esteban V.

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yipingwang
NXP TechSupport
NXP TechSupport

ccs::reset_to_debug

#Resets all devices connected to the specified
command converter on the specified server and stops
them at their reset vector in debug mode.

 

cs::stop_core #Halt Execution (place in debug mode) of a core.

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