Config Tools for i.MX v10 Now Available

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Config Tools for i.MX v10 Now Available

petrstruzka
NXP Employee
NXP Employee
0 0 1,603

The Config Tools for i.MX is a set of configuration tools that provide an efficient method
for evaluation and configuration of pins routing and DDR memory settings when designing
with NXP's application processors based on Arm® Cortex®-A cores, including i.MX MPUs.

 

The following tools are currently available:

Memory Tool

DDR Configuration and Validation tool allows you to create a configuration for the DDR component
and to validate the DDR configuration using various validation scenarios
Features:

  • Support for iMX8M, iMX8MM, iMX8MN and iMX8MP
  • DDR configuration UI using tokenized RPA tool
  • PHY initialization using dynamic library
  • Import the output of RPA tool will bypass UI configuration
  • Support for multiple phy firmware version including fw2020.06
  • Diagnostic fw2020.06
  • DDR phy support for DDR4 and LPDDR4
  • Basic/Advanced user mode
  • DDR controller Registers View support
  • Auto-detect of available COM ports
  • USB target connection
  • Basic validation tests support (Write-Read-Compare, Walking Ones, Walking Zeros)
  • DQ ODT and driver strength test
  • vTSA (Virtual Timing Signal Analysis) support - RX data eye, TX data eye
  • Stress tests support
  • Export vTSA results in JPEG format
  • Static Code generation in Uboot style
  • Command line possibility

Pins Tool

The Pins Tool is used for pin routing configuration, validation and code generation, including pin
functional/electrical properties, power rails, run-time configurations.
Features:

  • Desktop application
  • Muxing and pin configuration with consistency checking
  • Multicore support
  • Localized for English and Simplified Chinese
  • Mostly Connected: On-Demand device data download
  • Integrates with any compiler and IDE
  • Supports English and Chinese (simplified) languages, based on locale settings. Please refer to user manual for details.
  • ANSI-C initialization code
  • Graphical processor package view
  • Multiple configuration blocks/functions
  • Easy-to-use device configuration
    • Selection of Pins and Peripherals
    • Package with IP blocks
    • Routed pins with electrical characteristics
    • Registers with configured and reset values
    • Power Groups with assigned voltage levels
    • Source code for C/C++ applications
  • Documented and easy to understand source code
  • CSV Report and Device Tree File

Downloads & links

  • To download the installer for all platforms, please login to our download site via: 
  • Please refer to Documentation  for installation and quick start guides.
  • For further information about DDR config and validation, please go to this blog post.

 

Whats new in v10

  • Product based on Eclipse 2020-12
  • Moved from Open JDK 8 to Open JDK 11
  • Pins tool
    • added support of expansion board adapters - expansion boards that contains additional expansion headers
    • numbered suffix is added to function names and prefixes by default for expansion board functions
    • processor reset dialog offers 2 choices where available
  • DDR tool
    • Proper disclaimer was added when the DDR tool is used for the first time
    • Simplifying DDR configuration UI by using tokenized RPA tool
    • Import the output of RPA tool will bypass UI configuration
    • Switch between Configuration options
    • Board data bus configuration for LPDDR4
    • UART selection
    • IOMUX config (under Advanced mode)
    • PMIC config (under Advanced mode)
    • Custom configuration (under Advanced mode)
    • Dynamic DDR controller and DDR PHY code generation on host
    • Multiple frequency setpoints support
    • DQ ODT and DS configuration (under Advanced mode)
    • New validation categories (Inspection, Optimization, vTSA, Stressing)
    • DQ ODT and driver strength test
    • Apply the ODT configuration from the ODT map
  •