Watchdog enables itself after reset

[abdullahkahrama]

I am using TWR-S08DC-PT60 board which has a MC9S08PT60 microcontroller.

I am trying to disable the watchdog timer in my application. After configuring it in the software, it is disabled in the first run after programming, as wanted. However, after a reset occurs, either by reset button or power down, it is automatically enabled by itself. This happens when I debug, run or flash using CodeWarrior 10.4. Here is how I disable it:

  _WDOG_CS1.Bits.UPDATE = 1; // Enable changes to WDOG.   WDOG_CNT = 0xC520; // write the 1st unlock word   WDOG_CNT = 0xD928; // write the 2nd unlock word    _WDOG_CS1.Bits.EN = 0; // Kill the dog.   _WDOG_CS1.Bits.INT = 1; // Enable WDOG interrupt. 

When I debug the application, I can see that UPDATE bit is set and the watchdog timer is disabled, also, it behaves as desired when I reset using the debugger. However, in case of a reset by the reset button or power down, watchdog timer is enabled again and reset the MCU, since I do not feed it in the main loop. Also, it doesn't create an interrupt before resetting the MCU, although its interrupt is enabled. I can see, by the help of SYS_SRS (system reset source) register that the MCU is last reset by watchdog timer. Commenting out 2nd and 3rd line (WDOG_CNT=...) does not help.

Here is my full code:

main.c

init.h

init.c

(Links are to pastebin.com online source code sharing service.)

[bigmac]

Hello,

Yes, the watchdog timer is enabled by default, after each reset.  To disable, you will need to write to the WDOG_CS1 register early within your CPU_Init() function, i.e. WDOG_CS1 = 0; should suffice.  Since this is occurring immediately after a reset has occurred, this is the initial configuration process, and not a "re-configuration" of the watchdog.  The UPDATE bit should not be set unless you will require to enable the watchdog later.

I note that many of the registers within the watchdog module are "write once".  For these registers, all bits need to be simultaneously written.  Writing individual bits will not work as intended.  I would also suspect that write once would  apply to the re-configuration of a register, after it has been unlocked.

I notice that you are enabling interrupts prior to the initialisation functions.  Interrupts should generally not be globally enabled until after the initialisation has been completed.

Regards,

Mac

[abdullahkahrama · Accepted solution]

Hello,

Thanks for your answer and useful tips. I would be glad to hear any criticism to my code.

With your helpful answer, I have started investigating the problem and tried writing to WDOG_CS1 at once. Also, I have tried adding this code (WDOG_CS1=0;) into the startup code so that it is processed very early (within 128 bus clocks) after reset. However, that did not solve my problem.

Then, I have run across this sentence in page 615 of the reference manual, under section 23.3.2:

The new configuration takes effect only after all registers except WDOG_CNTH:L are

written once after reset. Otherwise, the WDOG uses the reset values by default. If

window mode is not used (WDOG_CS2[WIN] is 0), writing to WDOG_WINH:L is not

required to make the new configuration take effect.

Now I have added following code to my initialize_CPU() function and it works:

  WDOG_CS1 = 0x60;
  WDOG_CS2 = 1;
  WDOG_TOVAL = 0x04;

[bigmac]

Hello,

Abdullah Kahraman wrote:
The new configuration takes effect only after all registers except WDOG_CNTH:L are
written once after reset. Otherwise, the WDOG uses the reset values by default. If
window mode is not used (WDOG_CS2[WIN] is 0), writing to WDOG_WINH:L is not
required to make the new configuration take effect.

Now I have added following code to my initialize_CPU() function and it works: 

WDOG_CS1 = 0x60;
WDOG_CS2 = 1;
WDOG_TOVAL = 0x04;

The watchdog timer is much more finicky than the COP timer within other MCU derivatives!

However, I would expect that this should still work with WDOG_CS1 = 0;

Enabling the watchdog interrupt is somewhat pointless since the watchdog counter is disabled, and the interrupt will never occur.  And as I said previously, the update bit would only need to be set if you intended to enable the watchdog counter later in your code.  Generally, the update facility would only apply to the use of a bootloader.

A general observation about the watchdog operation concerns the ANSI code for copy down of global variable initial values, whichis executed prior to main() being called.  After POR the watchdog timer will be operational, and will time out after a period of 3.2 milliseconds, with worst case tolerance.  This means that the copy down process should be completed in less than this period, when executed at the POR default bus frequency.  This period should be satisfactory for most projects.  However, if a particular project had an abnormally large number of globals, including large arrays, the copy down process might need to be eliminated.

Regards,

Mac

[abdullahkahrama]

Yes, you are very right about the value of WDOG_CS1 register, it is set pointlessly. I am new to Freescale microcontroller world and I am trying to learn. So, for learning purposes, I am aware that I am doing pointless things :smileyhappy:

Also, thanks again for these wonderful tips!