diff --git a/board/peripherals.h b/board/peripherals.h
index 72aa0a4281b822e4687281f4caaf4d5de9d64319..6ca23a0cd932811a2fae07800be535da6cbcceab 100644
--- a/board/peripherals.h
+++ b/board/peripherals.h
@@ -145,15 +145,25 @@ extern "C" {
  * Global variables
  **********************************************************************************************************************/
 /* DMA0 channel LOG_UART TCD array */
-extern dma_descriptor_t DMA0_LOG_UART_TCDs_config[1];
+AT_NONCACHEABLE_SECTION_ALIGN(extern dma_descriptor_t DMA0_LOG_UART_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE);
 /* DMA0 channel ADXL362 TCD array */
-extern dma_descriptor_t DMA0_ADXL362_TCDs_config[1];
+AT_NONCACHEABLE_SECTION_ALIGN(extern dma_descriptor_t DMA0_ADXL362_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE);
 /* DMA0 channel AD7191 TCD array */
-extern dma_descriptor_t DMA0_AD7191_TCDs_config[1];
+AT_NONCACHEABLE_SECTION_ALIGN(extern dma_descriptor_t DMA0_AD7191_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE);
 /* DMA0 channel ADXL362_RX TCD array */
-extern dma_descriptor_t DMA0_ADXL362_RX_TCDs_config[1];
+AT_NONCACHEABLE_SECTION_ALIGN(extern dma_descriptor_t DMA0_ADXL362_RX_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE);
 /* DMA0 channel AD7191_RX TCD array */
-extern dma_descriptor_t DMA0_AD7191_RX_TCDs_config[1];
+AT_NONCACHEABLE_SECTION_ALIGN(extern dma_descriptor_t DMA0_AD7191_RX_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE);
+/* LOG_UART_TCD0 source address extern definition */
+extern struct {} uartLogData;
+/* ADXL362_TCD0 source address extern definition */
+extern uint32_t ADXL362SPIData[];
+/* AD7191_TCD0 source address extern definition */
+extern uint32_t AD7191SPIData[];
+/* ADXL362_RX_TCD0 destination address extern definition */
+extern int16_t ADXL362SPIRXData[];
+/* AD7191_RX_TCD0 destination address extern definition */
+extern uint16_t AD7191SPIRXData[];
 extern const mrt_config_t MRT0_config;
 extern const spi_master_config_t SPI0_config;
 extern const spi_master_config_t SPI1_config;
diff --git a/board/peripherals.c b/board/peripherals.c
index a02c76a085dfa20065344d595ce57e7f385b1172..f137ba5a750ff70edb3a9f3c32f1735f1b0388ef 100644
--- a/board/peripherals.c
+++ b/board/peripherals.c
@@ -6,11 +6,11 @@
 /* clang-format off */
 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 !!GlobalInfo
-product: Peripherals v10.0
+product: Peripherals v11.0
 processor: LPC844
 package_id: LPC844M201JHI33
 mcu_data: ksdk2_0
-processor_version: 10.0.0
+processor_version: 11.0.1
 functionalGroups:
 - name: BOARD_InitPeripherals
   UUID: 5c98ec69-4e32-4e65-8aec-20c4c6cd7aa9
@@ -275,9 +275,7 @@ instance:
   /* Channel ADXL362_RX global variables */
 
   /* Channel AD7191_RX global variables */
-/* LOG_UART_TCD0 source address extern definition */
-extern struct {} uartLogData;
-AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_LOG_UART_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE )
+AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_LOG_UART_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE)
  = {
   {
     .xfercfg = DMA_CHANNEL_XFER(true, true, false, false, kDMA_Transfer8BitWidth, kDMA_AddressInterleave1xWidth, kDMA_AddressInterleave0xWidth, 12U),
@@ -286,9 +284,7 @@ AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_LOG_UART_TCDs_config[1], FSL
     .linkToNextDesc = &DMA0_LOG_UART_TCD0_config
   }
 };
-/* ADXL362_TCD0 source address extern definition */
-extern uint32_t ADXL362SPIData[];
-AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_ADXL362_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE )
+AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_ADXL362_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE)
  = {
   {
     .xfercfg = DMA_CHANNEL_XFER(true, true, false, false, kDMA_Transfer32BitWidth, kDMA_AddressInterleave1xWidth, kDMA_AddressInterleave0xWidth, 8U),
@@ -297,9 +293,7 @@ AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_ADXL362_TCDs_config[1], FSL_
     .linkToNextDesc = &DMA0_ADXL362_TCD0_config
   }
 };
-/* AD7191_TCD0 source address extern definition */
-extern uint32_t AD7191SPIData[];
-AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_AD7191_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE )
+AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_AD7191_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE)
  = {
   {
     .xfercfg = DMA_CHANNEL_XFER(true, true, false, false, kDMA_Transfer32BitWidth, kDMA_AddressInterleave1xWidth, kDMA_AddressInterleave0xWidth, 8U),
@@ -308,9 +302,7 @@ AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_AD7191_TCDs_config[1], FSL_F
     .linkToNextDesc = &DMA0_AD7191_TCD0_config
   }
 };
-/* ADXL362_RX_TCD0 destination address extern definition */
-extern int16_t ADXL362SPIRXData[];
-AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_ADXL362_RX_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE )
+AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_ADXL362_RX_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE)
  = {
   {
     .xfercfg = DMA_CHANNEL_XFER(true, false, false, false, kDMA_Transfer16BitWidth, kDMA_AddressInterleave0xWidth, kDMA_AddressInterleave1xWidth, 4U),
@@ -319,9 +311,7 @@ AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_ADXL362_RX_TCDs_config[1], F
     .linkToNextDesc = &DMA0_ADXL362_RX_TCD0_config
   }
 };
-/* AD7191_RX_TCD0 destination address extern definition */
-extern uint16_t AD7191SPIRXData[];
-AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_AD7191_RX_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE )
+AT_NONCACHEABLE_SECTION_ALIGN(dma_descriptor_t DMA0_AD7191_RX_TCDs_config[1], FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE)
  = {
   {
     .xfercfg = DMA_CHANNEL_XFER(true, false, true, false, kDMA_Transfer16BitWidth, kDMA_AddressInterleave0xWidth, kDMA_AddressInterleave1xWidth, 4U),
@@ -793,6 +783,7 @@ instance:
         - outControl: 'kCTIMER_Output_NoAction'
         - outPinInitValue: 'low'
         - enableInterrupt: 'true'
+    - captureChannels: []
     - interruptCallbackConfig:
       - interrupt:
         - IRQn: 'CTIMER0_IRQn'