1 | /*********************************************************************************************************************** |
2 | * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file |
3 | * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. |
4 | **********************************************************************************************************************/ |
5 | |
6 | /* |
7 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* |
8 | !!GlobalInfo |
9 | product: Pins v11.0 |
10 | processor: MIMXRT1062xxxxA |
11 | package_id: MIMXRT1062DVL6A |
12 | mcu_data: ksdk2_0 |
13 | processor_version: 11.0.1 |
14 | board: MIMXRT1060-EVK |
15 | pin_labels: |
16 | - {pin_num: D5, pin_signal: GPIO_EMC_32, label: GPIO3_18, identifier: GPIO3_18} |
17 | - {pin_num: C4, pin_signal: GPIO_EMC_33, label: GPIO3_19, identifier: GPIO3_19} |
18 | - {pin_num: D4, pin_signal: GPIO_EMC_34, label: GPIO3_20, identifier: GPIO3_20} |
19 | - {pin_num: E4, pin_signal: GPIO_EMC_37, label: GPIO3_23, identifier: GPIO3_23} |
20 | - {pin_num: D6, pin_signal: GPIO_EMC_38, label: GPIO3_24, identifier: GPIO3_24} |
21 | - {pin_num: B7, pin_signal: GPIO_EMC_39, label: GPIO3_25, identifier: GPIO3_25} |
22 | - {pin_num: H10, pin_signal: GPIO_AD_B0_01, label: GPIO1_01, identifier: GPIO1_01} |
23 | - {pin_num: F11, pin_signal: GPIO_AD_B0_04, label: GPIO1_04, identifier: GPIO1_04} |
24 | - {pin_num: G14, pin_signal: GPIO_AD_B0_05, label: GPIO1_05, identifier: GPIO1_05} |
25 | - {pin_num: F12, pin_signal: GPIO_AD_B0_07, label: GPIO1_07, identifier: GPIO1_07} |
26 | - {pin_num: F14, pin_signal: GPIO_AD_B0_09, label: USER_LED, identifier: LED;USER_SW;USER_LED} |
27 | - {pin_num: H12, pin_signal: GPIO_AD_B1_12, label: GPIO1_28, identifier: GPIO1_28} |
28 | - {pin_num: H11, pin_signal: GPIO_AD_B1_13, label: GPIO1_29, identifier: GPIO1_29} |
29 | - {pin_num: G12, pin_signal: GPIO_AD_B1_14, label: GPIO1_30, identifier: GPIO1_30} |
30 | - {pin_num: J14, pin_signal: GPIO_AD_B1_15, label: GPIO1_31, identifier: GPIO1_31} |
31 | - {pin_num: L5, pin_signal: GPIO_SD_B1_00, label: GPIO3_00, identifier: GPIO3_00} |
32 | - {pin_num: M5, pin_signal: GPIO_SD_B1_01, label: GPIO3_01, identifier: GPIO3_01} |
33 | - {pin_num: M3, pin_signal: GPIO_SD_B1_02, label: GPIO3_02, identifier: GPIO3_02} |
34 | - {pin_num: M4, pin_signal: GPIO_SD_B1_03, label: GPIO3_03, identifier: GPIO3_03} |
35 | - {pin_num: P2, pin_signal: GPIO_SD_B1_04, label: GPIO3_04, identifier: GPIO3_04} |
36 | - {pin_num: N3, pin_signal: GPIO_SD_B1_05, label: GPIO3_05, identifier: GPIO3_05} |
37 | - {pin_num: L3, pin_signal: GPIO_SD_B1_06, label: GPIO3_06, identifier: GPIO3_06} |
38 | - {pin_num: L4, pin_signal: GPIO_SD_B1_07, label: GPIO3_07, identifier: GPIO3_07} |
39 | - {pin_num: P3, pin_signal: GPIO_SD_B1_08, label: GPIO3_08, identifier: GPIO3_08} |
40 | - {pin_num: N4, pin_signal: GPIO_SD_B1_09, label: GPIO3_09, identifier: GPIO3_09} |
41 | - {pin_num: P4, pin_signal: GPIO_SD_B1_10, label: GPIO3_10, identifier: GPIO3_10} |
42 | - {pin_num: P5, pin_signal: GPIO_SD_B1_11, label: GPIO3_11, identifier: GPIO3_11} |
43 | - {pin_num: L6, pin_signal: WAKEUP, label: USER_BTN, identifier: LED;SW;USER_BTN} |
44 | - {pin_num: K7, pin_signal: PMIC_ON_REQ, label: GPIO5_01, identifier: GPIO5_01} |
45 | - {pin_num: L7, pin_signal: PMIC_STBY_REQ, label: GPIO5_02, identifier: GPIO5_02} |
46 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** |
47 | */ |
48 | |
49 | #include "fsl_common.h" |
50 | #include "fsl_xbara.h" |
51 | #include "fsl_xbarb.h" |
52 | #include "fsl_iomuxc.h" |
53 | #include "fsl_gpio.h" |
54 | #include "pin_mux.h" |
55 | |
56 | /* FUNCTION ************************************************************************************************************ |
57 | * |
58 | * Function Name : BOARD_InitBootPins |
59 | * Description : Calls initialization functions. |
60 | * |
61 | * END ****************************************************************************************************************/ |
62 | void BOARD_InitBootPins(void) { |
63 | BOARD_InitPins(); |
64 | } |
65 | |
66 | /* |
67 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* |
68 | BOARD_InitPins: |
69 | - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'} |
70 | - pin_list: |
71 | - {pin_num: J13, peripheral: ADC1, signal: 'IN, 0', pin_signal: GPIO_AD_B1_11} |
72 | - {pin_num: L13, peripheral: ADC1, signal: 'IN, 15', pin_signal: GPIO_AD_B1_10} |
73 | - {pin_num: C8, peripheral: FLEXIO2, signal: 'IO, 04', pin_signal: GPIO_B0_04} |
74 | - {pin_num: B8, peripheral: FLEXIO2, signal: 'IO, 05', pin_signal: GPIO_B0_05} |
75 | - {pin_num: A8, peripheral: FLEXIO2, signal: 'IO, 06', pin_signal: GPIO_B0_06} |
76 | - {pin_num: J11, peripheral: LPI2C1, signal: SCL, pin_signal: GPIO_AD_B1_00} |
77 | - {pin_num: K11, peripheral: LPI2C1, signal: SDA, pin_signal: GPIO_AD_B1_01} |
78 | - {pin_num: J4, peripheral: LPSPI1, signal: SCK, pin_signal: GPIO_SD_B0_00} |
79 | - {pin_num: J1, peripheral: LPSPI1, signal: SDO, pin_signal: GPIO_SD_B0_02} |
80 | - {pin_num: K1, peripheral: LPSPI1, signal: SDI, pin_signal: GPIO_SD_B0_03} |
81 | - {pin_num: J3, peripheral: LPSPI1, signal: PCS0, pin_signal: GPIO_SD_B0_01} |
82 | - {pin_num: C5, peripheral: LPSPI1, signal: PCS1, pin_signal: GPIO_EMC_31} |
83 | - {pin_num: A5, peripheral: LPSPI1, signal: TRG, pin_signal: GPIO_EMC_16} |
84 | - {pin_num: D10, peripheral: PIT, signal: 'TRIGGER, 1', pin_signal: GPIO_B0_13} |
85 | - {pin_num: J2, peripheral: PIT, signal: 'TRIGGER, 2', pin_signal: GPIO_SD_B0_05} |
86 | - {pin_num: H10, peripheral: GPIO1, signal: 'gpio_io, 01', pin_signal: GPIO_AD_B0_01, direction: INPUT, gpio_interrupt: kGPIO_NoIntmode} |
87 | - {pin_num: F11, peripheral: GPIO1, signal: 'gpio_io, 04', pin_signal: GPIO_AD_B0_04, direction: INPUT, gpio_interrupt: kGPIO_NoIntmode} |
88 | - {pin_num: G14, peripheral: GPIO1, signal: 'gpio_io, 05', pin_signal: GPIO_AD_B0_05, direction: INPUT, gpio_interrupt: kGPIO_NoIntmode} |
89 | - {pin_num: F14, peripheral: GPIO1, signal: 'gpio_io, 09', pin_signal: GPIO_AD_B0_09, identifier: USER_LED, direction: OUTPUT} |
90 | - {pin_num: H12, peripheral: GPIO1, signal: 'gpio_io, 28', pin_signal: GPIO_AD_B1_12, direction: OUTPUT} |
91 | - {pin_num: H11, peripheral: GPIO1, signal: 'gpio_io, 29', pin_signal: GPIO_AD_B1_13, direction: OUTPUT} |
92 | - {pin_num: G12, peripheral: GPIO1, signal: 'gpio_io, 30', pin_signal: GPIO_AD_B1_14, direction: OUTPUT} |
93 | - {pin_num: J14, peripheral: GPIO1, signal: 'gpio_io, 31', pin_signal: GPIO_AD_B1_15, direction: OUTPUT} |
94 | - {pin_num: L6, peripheral: GPIO5, signal: 'gpio_io, 00', pin_signal: WAKEUP, identifier: USER_BTN, direction: INPUT, gpio_interrupt: kGPIO_IntFallingEdge} |
95 | - {pin_num: K7, peripheral: GPIO5, signal: 'gpio_io, 01', pin_signal: PMIC_ON_REQ, direction: INPUT} |
96 | - {pin_num: L7, peripheral: GPIO5, signal: 'gpio_io, 02', pin_signal: PMIC_STBY_REQ, direction: INPUT} |
97 | - {pin_num: G13, peripheral: PWM1, signal: 'A, 3', pin_signal: GPIO_AD_B0_10} |
98 | - {pin_num: D1, peripheral: PWM1, signal: 'B, 2', pin_signal: GPIO_EMC_28} |
99 | - {pin_num: B3, peripheral: PWM1, signal: 'B, 1', pin_signal: GPIO_EMC_26} |
100 | - {pin_num: D3, peripheral: PWM1, signal: 'B, 0', pin_signal: GPIO_EMC_24} |
101 | - {pin_num: A2, peripheral: PWM1, signal: 'A, 2', pin_signal: GPIO_EMC_27} |
102 | - {pin_num: D2, peripheral: PWM1, signal: 'A, 1', pin_signal: GPIO_EMC_25} |
103 | - {pin_num: G2, peripheral: PWM1, signal: 'A, 0', pin_signal: GPIO_EMC_23} |
104 | - {peripheral: AOI1, signal: 'IN, 0', pin_signal: ACMP1_OUT} |
105 | - {peripheral: AOI1, signal: 'IN, 1', pin_signal: ACMP2_OUT} |
106 | - {peripheral: AOI1, signal: 'IN, 2', pin_signal: ACMP3_OUT} |
107 | - {peripheral: AOI1, signal: 'IN, 3', pin_signal: ACMP4_OUT} |
108 | - {peripheral: AOI1, signal: 'IN, 4', pin_signal: ADC_ETC_XBAR0_COCO0} |
109 | - {peripheral: AOI1, signal: 'IN, 5', pin_signal: ADC_ETC_XBAR0_COCO1} |
110 | - {peripheral: AOI1, signal: 'IN, 6', pin_signal: ADC_ETC_XBAR0_COCO2} |
111 | - {peripheral: AOI1, signal: 'IN, 7', pin_signal: ADC_ETC_XBAR0_COCO3} |
112 | - {peripheral: AOI1, signal: 'IN, 8', pin_signal: ADC_ETC_XBAR1_COCO0} |
113 | - {peripheral: AOI1, signal: 'IN, 9', pin_signal: ADC_ETC_XBAR1_COCO1} |
114 | - {peripheral: AOI1, signal: 'IN, 10', pin_signal: ADC_ETC_XBAR1_COCO2} |
115 | - {peripheral: AOI1, signal: 'IN, 11', pin_signal: ADC_ETC_XBAR1_COCO3} |
116 | - {peripheral: AOI1, signal: 'IN, 12', pin_signal: DMA_DONE0} |
117 | - {peripheral: AOI1, signal: 'IN, 13', pin_signal: DMA_DONE1} |
118 | - {peripheral: AOI1, signal: 'IN, 14', pin_signal: DMA_DONE2} |
119 | - {peripheral: AOI1, signal: 'IN, 15', pin_signal: DMA_DONE3} |
120 | - {pin_num: C10, peripheral: AOI1, signal: 'OUT, 1', pin_signal: GPIO_B0_12} |
121 | - {pin_num: G5, peripheral: AOI1, signal: 'OUT, 3', pin_signal: GPIO_EMC_05} |
122 | - {pin_num: F3, peripheral: FLEXIO1, signal: 'IO, 01', pin_signal: GPIO_EMC_01} |
123 | - {pin_num: B14, peripheral: FLEXIO3, signal: 'IO, 31', pin_signal: GPIO_B1_15} |
124 | - {pin_num: C14, peripheral: FLEXIO3, signal: 'IO, 30', pin_signal: GPIO_B1_14} |
125 | - {pin_num: A9, peripheral: FLEXIO2, signal: 'IO, 07', pin_signal: GPIO_B0_07} |
126 | - {pin_num: H14, peripheral: CAN2, signal: TX, pin_signal: GPIO_AD_B0_14} |
127 | - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12} |
128 | - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13} |
129 | - {pin_num: H5, peripheral: PIT, signal: 'TRIGGER, 3', pin_signal: GPIO_EMC_06} |
130 | - {pin_num: L12, peripheral: ADC1, signal: 'IN, 9', pin_signal: GPIO_AD_B1_04} |
131 | - {pin_num: J12, peripheral: FLEXIO3, signal: 'IO, 06', pin_signal: GPIO_AD_B1_06} |
132 | - {pin_num: K10, peripheral: FLEXIO3, signal: 'IO, 07', pin_signal: GPIO_AD_B1_07} |
133 | - {pin_num: H13, peripheral: CMP2, signal: 'IN, 5', pin_signal: GPIO_AD_B1_08} |
134 | - {pin_num: M12, peripheral: GPT2, signal: 'gpt_capture, 1', pin_signal: GPIO_AD_B1_03} |
135 | - {pin_num: K12, peripheral: GPT2, signal: 'gpt_compare, 1', pin_signal: GPIO_AD_B1_05} |
136 | - {pin_num: L11, peripheral: GPT2, signal: gpt_clk, pin_signal: GPIO_AD_B1_02} |
137 | - {pin_num: M11, peripheral: ENC1, signal: 'PHASE, A', pin_signal: GPIO_AD_B0_02} |
138 | - {pin_num: G11, peripheral: ENC1, signal: 'PHASE, B', pin_signal: GPIO_AD_B0_03} |
139 | - {pin_num: B11, peripheral: PIT, signal: 'TRIGGER, 0', pin_signal: GPIO_B1_01} |
140 | - {pin_num: M14, peripheral: AOI1, signal: 'OUT, 0', pin_signal: GPIO_AD_B0_00} |
141 | - {pin_num: H1, peripheral: ENC1, signal: HOME, pin_signal: GPIO_EMC_12} |
142 | - {pin_num: F2, peripheral: ENC1, signal: INDEX, pin_signal: GPIO_EMC_04} |
143 | - {pin_num: B6, peripheral: ENC1, signal: POSMATCH, pin_signal: GPIO_EMC_14} |
144 | - {pin_num: F2, peripheral: ENC1, signal: TRG, pin_signal: GPIO_EMC_04, identifier: ''} |
145 | - {pin_num: F4, peripheral: DMA0, signal: 'DONE, 1', pin_signal: GPIO_EMC_02} |
146 | - {pin_num: E5, peripheral: AOI1, signal: 'OUT, 2', pin_signal: GPIO_EMC_35} |
147 | - {pin_num: E10, peripheral: DMA0, signal: 'DONE, 0', pin_signal: GPIO_B0_14} |
148 | - {pin_num: F2, peripheral: DMA0, signal: 'REQ, 30', pin_signal: GPIO_EMC_04, identifier: ''} |
149 | - {pin_num: H1, peripheral: DMA0, signal: 'REQ, 31', pin_signal: GPIO_EMC_12, identifier: ''} |
150 | - {pin_num: G4, peripheral: CMP2, signal: OUT, pin_signal: GPIO_EMC_03} |
151 | - {pin_num: F2, peripheral: CMP2, signal: SAMPLE, pin_signal: GPIO_EMC_04, identifier: ''} |
152 | - {pin_num: D7, peripheral: TMR1, signal: 'TIMER, 0', pin_signal: GPIO_B0_00} |
153 | - {pin_num: E7, peripheral: TMR1, signal: 'TIMER, 1', pin_signal: GPIO_B0_01} |
154 | - {pin_num: A5, peripheral: TMR1, signal: 'TIMER_INPUT, 2', pin_signal: GPIO_EMC_16, identifier: ''} |
155 | - {peripheral: PWM1, signal: 'FAULT, 0', pin_signal: LOGIC_HIGH} |
156 | - {peripheral: PWM1, signal: 'FAULT, 1', pin_signal: LOGIC_HIGH} |
157 | - {peripheral: PWM1, signal: 'FAULT, 2', pin_signal: LOGIC_HIGH} |
158 | - {peripheral: PWM1, signal: 'FAULT, 3', pin_signal: LOGIC_HIGH} |
159 | - {pin_num: L5, peripheral: GPIO3, signal: 'gpio_io, 00', pin_signal: GPIO_SD_B1_00, direction: OUTPUT} |
160 | - {pin_num: M5, peripheral: GPIO3, signal: 'gpio_io, 01', pin_signal: GPIO_SD_B1_01, direction: OUTPUT} |
161 | - {pin_num: M3, peripheral: GPIO3, signal: 'gpio_io, 02', pin_signal: GPIO_SD_B1_02, direction: OUTPUT} |
162 | - {pin_num: M4, peripheral: GPIO3, signal: 'gpio_io, 03', pin_signal: GPIO_SD_B1_03, direction: OUTPUT} |
163 | - {pin_num: B7, peripheral: GPIO3, signal: 'gpio_io, 25', pin_signal: GPIO_EMC_39, direction: INPUT} |
164 | - {pin_num: D6, peripheral: GPIO3, signal: 'gpio_io, 24', pin_signal: GPIO_EMC_38, direction: INPUT} |
165 | - {pin_num: E4, peripheral: GPIO3, signal: 'gpio_io, 23', pin_signal: GPIO_EMC_37, direction: INPUT} |
166 | - {pin_num: D4, peripheral: GPIO3, signal: 'gpio_io, 20', pin_signal: GPIO_EMC_34, direction: INPUT} |
167 | - {pin_num: C4, peripheral: GPIO3, signal: 'gpio_io, 19', pin_signal: GPIO_EMC_33, direction: INPUT} |
168 | - {pin_num: D5, peripheral: GPIO3, signal: 'gpio_io, 18', pin_signal: GPIO_EMC_32, direction: INPUT} |
169 | - {pin_num: G1, peripheral: CAN2, signal: RX, pin_signal: GPIO_EMC_10} |
170 | - {pin_num: G10, peripheral: WDOG1, signal: wdog_b, pin_signal: GPIO_AD_B0_11, identifier: ''} |
171 | - {pin_num: A6, peripheral: PWM1, signal: 'B, 3', pin_signal: GPIO_EMC_13} |
172 | - {pin_num: E3, peripheral: FLEXIO1, signal: 'IO, 00', pin_signal: GPIO_EMC_00} |
173 | - {pin_num: E12, peripheral: ENET, signal: 'enet_rx_data, 0', pin_signal: GPIO_B1_04, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull, speed: MHZ_200, |
174 | drive_strength: R0_5, slew_rate: Fast} |
175 | - {pin_num: D12, peripheral: ENET, signal: 'enet_rx_data, 1', pin_signal: GPIO_B1_05, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull, speed: MHZ_200, |
176 | drive_strength: R0_5, slew_rate: Fast} |
177 | - {pin_num: C12, peripheral: ENET, signal: enet_rx_en, pin_signal: GPIO_B1_06, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull, speed: MHZ_200, |
178 | drive_strength: R0_5, slew_rate: Fast} |
179 | - {pin_num: B12, peripheral: ENET, signal: 'enet_tx_data, 0', pin_signal: GPIO_B1_07, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull, speed: MHZ_200, |
180 | drive_strength: R0_5, slew_rate: Fast} |
181 | - {pin_num: A12, peripheral: ENET, signal: 'enet_tx_data, 1', pin_signal: GPIO_B1_08, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull, speed: MHZ_200, |
182 | drive_strength: R0_5, slew_rate: Fast} |
183 | - {pin_num: A13, peripheral: ENET, signal: enet_tx_en, pin_signal: GPIO_B1_09, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull, speed: MHZ_200, |
184 | drive_strength: R0_5, slew_rate: Fast} |
185 | - {pin_num: B13, peripheral: ENET, signal: enet_ref_clk, pin_signal: GPIO_B1_10, software_input_on: Enable, pull_up_down_config: Pull_Down_100K_Ohm, pull_keeper_select: Keeper, |
186 | pull_keeper_enable: Disable, speed: MHZ_50, drive_strength: R0_6, slew_rate: Fast} |
187 | - {pin_num: C13, peripheral: ENET, signal: enet_rx_er, pin_signal: GPIO_B1_11, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull, speed: MHZ_200, |
188 | drive_strength: R0_5, slew_rate: Fast} |
189 | - {pin_num: A7, peripheral: ENET, signal: enet_mdc, pin_signal: GPIO_EMC_40, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull, open_drain: Disable, |
190 | speed: MHZ_200, drive_strength: R0_5, slew_rate: Fast} |
191 | - {pin_num: C7, peripheral: ENET, signal: enet_mdio, pin_signal: GPIO_EMC_41, pull_up_down_config: Pull_Up_100K_Ohm, pull_keeper_select: Pull, open_drain: Enable, |
192 | speed: MHZ_50, drive_strength: R0_5, slew_rate: Fast} |
193 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** |
194 | */ |
195 | |
196 | /* FUNCTION ************************************************************************************************************ |
197 | * |
198 | * Function Name : BOARD_InitPins |
199 | * Description : Configures pin routing and optionally pin electrical features. |
200 | * |
201 | * END ****************************************************************************************************************/ |
202 | void BOARD_InitPins(void) { |
203 | CLOCK_EnableClock(kCLOCK_Iomuxc); |
204 | CLOCK_EnableClock(kCLOCK_IomuxcSnvs); |
205 | CLOCK_EnableClock(kCLOCK_Xbar1); |
206 | CLOCK_EnableClock(kCLOCK_Xbar2); |
207 | |
208 | /* GPIO configuration of GPIO1_01 on GPIO_AD_B0_01 (pin H10) */ |
209 | gpio_pin_config_t GPIO1_01_config = { |
210 | .direction = kGPIO_DigitalInput, |
211 | .outputLogic = 0U, |
212 | .interruptMode = kGPIO_NoIntmode |
213 | }; |
214 | /* Initialize GPIO functionality on GPIO_AD_B0_01 (pin H10) */ |
215 | GPIO_PinInit(GPIO1, 1U, &GPIO1_01_config); |
216 | |
217 | /* GPIO configuration of GPIO1_04 on GPIO_AD_B0_04 (pin F11) */ |
218 | gpio_pin_config_t GPIO1_04_config = { |
219 | .direction = kGPIO_DigitalInput, |
220 | .outputLogic = 0U, |
221 | .interruptMode = kGPIO_NoIntmode |
222 | }; |
223 | /* Initialize GPIO functionality on GPIO_AD_B0_04 (pin F11) */ |
224 | GPIO_PinInit(GPIO1, 4U, &GPIO1_04_config); |
225 | |
226 | /* GPIO configuration of GPIO1_05 on GPIO_AD_B0_05 (pin G14) */ |
227 | gpio_pin_config_t GPIO1_05_config = { |
228 | .direction = kGPIO_DigitalInput, |
229 | .outputLogic = 0U, |
230 | .interruptMode = kGPIO_NoIntmode |
231 | }; |
232 | /* Initialize GPIO functionality on GPIO_AD_B0_05 (pin G14) */ |
233 | GPIO_PinInit(GPIO1, 5U, &GPIO1_05_config); |
234 | |
235 | /* GPIO configuration of USER_LED on GPIO_AD_B0_09 (pin F14) */ |
236 | gpio_pin_config_t USER_LED_config = { |
237 | .direction = kGPIO_DigitalOutput, |
238 | .outputLogic = 0U, |
239 | .interruptMode = kGPIO_NoIntmode |
240 | }; |
241 | /* Initialize GPIO functionality on GPIO_AD_B0_09 (pin F14) */ |
242 | GPIO_PinInit(GPIO1, 9U, &USER_LED_config); |
243 | |
244 | /* GPIO configuration of GPIO1_28 on GPIO_AD_B1_12 (pin H12) */ |
245 | gpio_pin_config_t GPIO1_28_config = { |
246 | .direction = kGPIO_DigitalOutput, |
247 | .outputLogic = 0U, |
248 | .interruptMode = kGPIO_NoIntmode |
249 | }; |
250 | /* Initialize GPIO functionality on GPIO_AD_B1_12 (pin H12) */ |
251 | GPIO_PinInit(GPIO1, 28U, &GPIO1_28_config); |
252 | |
253 | /* GPIO configuration of GPIO1_29 on GPIO_AD_B1_13 (pin H11) */ |
254 | gpio_pin_config_t GPIO1_29_config = { |
255 | .direction = kGPIO_DigitalOutput, |
256 | .outputLogic = 0U, |
257 | .interruptMode = kGPIO_NoIntmode |
258 | }; |
259 | /* Initialize GPIO functionality on GPIO_AD_B1_13 (pin H11) */ |
260 | GPIO_PinInit(GPIO1, 29U, &GPIO1_29_config); |
261 | |
262 | /* GPIO configuration of GPIO1_30 on GPIO_AD_B1_14 (pin G12) */ |
263 | gpio_pin_config_t GPIO1_30_config = { |
264 | .direction = kGPIO_DigitalOutput, |
265 | .outputLogic = 0U, |
266 | .interruptMode = kGPIO_NoIntmode |
267 | }; |
268 | /* Initialize GPIO functionality on GPIO_AD_B1_14 (pin G12) */ |
269 | GPIO_PinInit(GPIO1, 30U, &GPIO1_30_config); |
270 | |
271 | /* GPIO configuration of GPIO1_31 on GPIO_AD_B1_15 (pin J14) */ |
272 | gpio_pin_config_t GPIO1_31_config = { |
273 | .direction = kGPIO_DigitalOutput, |
274 | .outputLogic = 0U, |
275 | .interruptMode = kGPIO_NoIntmode |
276 | }; |
277 | /* Initialize GPIO functionality on GPIO_AD_B1_15 (pin J14) */ |
278 | GPIO_PinInit(GPIO1, 31U, &GPIO1_31_config); |
279 | |
280 | /* GPIO configuration of GPIO3_00 on GPIO_SD_B1_00 (pin L5) */ |
281 | gpio_pin_config_t GPIO3_00_config = { |
282 | .direction = kGPIO_DigitalOutput, |
283 | .outputLogic = 0U, |
284 | .interruptMode = kGPIO_NoIntmode |
285 | }; |
286 | /* Initialize GPIO functionality on GPIO_SD_B1_00 (pin L5) */ |
287 | GPIO_PinInit(GPIO3, 0U, &GPIO3_00_config); |
288 | |
289 | /* GPIO configuration of GPIO3_01 on GPIO_SD_B1_01 (pin M5) */ |
290 | gpio_pin_config_t GPIO3_01_config = { |
291 | .direction = kGPIO_DigitalOutput, |
292 | .outputLogic = 0U, |
293 | .interruptMode = kGPIO_NoIntmode |
294 | }; |
295 | /* Initialize GPIO functionality on GPIO_SD_B1_01 (pin M5) */ |
296 | GPIO_PinInit(GPIO3, 1U, &GPIO3_01_config); |
297 | |
298 | /* GPIO configuration of GPIO3_02 on GPIO_SD_B1_02 (pin M3) */ |
299 | gpio_pin_config_t GPIO3_02_config = { |
300 | .direction = kGPIO_DigitalOutput, |
301 | .outputLogic = 0U, |
302 | .interruptMode = kGPIO_NoIntmode |
303 | }; |
304 | /* Initialize GPIO functionality on GPIO_SD_B1_02 (pin M3) */ |
305 | GPIO_PinInit(GPIO3, 2U, &GPIO3_02_config); |
306 | |
307 | /* GPIO configuration of GPIO3_03 on GPIO_SD_B1_03 (pin M4) */ |
308 | gpio_pin_config_t GPIO3_03_config = { |
309 | .direction = kGPIO_DigitalOutput, |
310 | .outputLogic = 0U, |
311 | .interruptMode = kGPIO_NoIntmode |
312 | }; |
313 | /* Initialize GPIO functionality on GPIO_SD_B1_03 (pin M4) */ |
314 | GPIO_PinInit(GPIO3, 3U, &GPIO3_03_config); |
315 | |
316 | /* GPIO configuration of GPIO3_18 on GPIO_EMC_32 (pin D5) */ |
317 | gpio_pin_config_t GPIO3_18_config = { |
318 | .direction = kGPIO_DigitalInput, |
319 | .outputLogic = 0U, |
320 | .interruptMode = kGPIO_NoIntmode |
321 | }; |
322 | /* Initialize GPIO functionality on GPIO_EMC_32 (pin D5) */ |
323 | GPIO_PinInit(GPIO3, 18U, &GPIO3_18_config); |
324 | |
325 | /* GPIO configuration of GPIO3_19 on GPIO_EMC_33 (pin C4) */ |
326 | gpio_pin_config_t GPIO3_19_config = { |
327 | .direction = kGPIO_DigitalInput, |
328 | .outputLogic = 0U, |
329 | .interruptMode = kGPIO_NoIntmode |
330 | }; |
331 | /* Initialize GPIO functionality on GPIO_EMC_33 (pin C4) */ |
332 | GPIO_PinInit(GPIO3, 19U, &GPIO3_19_config); |
333 | |
334 | /* GPIO configuration of GPIO3_20 on GPIO_EMC_34 (pin D4) */ |
335 | gpio_pin_config_t GPIO3_20_config = { |
336 | .direction = kGPIO_DigitalInput, |
337 | .outputLogic = 0U, |
338 | .interruptMode = kGPIO_NoIntmode |
339 | }; |
340 | /* Initialize GPIO functionality on GPIO_EMC_34 (pin D4) */ |
341 | GPIO_PinInit(GPIO3, 20U, &GPIO3_20_config); |
342 | |
343 | /* GPIO configuration of GPIO3_23 on GPIO_EMC_37 (pin E4) */ |
344 | gpio_pin_config_t GPIO3_23_config = { |
345 | .direction = kGPIO_DigitalInput, |
346 | .outputLogic = 0U, |
347 | .interruptMode = kGPIO_NoIntmode |
348 | }; |
349 | /* Initialize GPIO functionality on GPIO_EMC_37 (pin E4) */ |
350 | GPIO_PinInit(GPIO3, 23U, &GPIO3_23_config); |
351 | |
352 | /* GPIO configuration of GPIO3_24 on GPIO_EMC_38 (pin D6) */ |
353 | gpio_pin_config_t GPIO3_24_config = { |
354 | .direction = kGPIO_DigitalInput, |
355 | .outputLogic = 0U, |
356 | .interruptMode = kGPIO_NoIntmode |
357 | }; |
358 | /* Initialize GPIO functionality on GPIO_EMC_38 (pin D6) */ |
359 | GPIO_PinInit(GPIO3, 24U, &GPIO3_24_config); |
360 | |
361 | /* GPIO configuration of GPIO3_25 on GPIO_EMC_39 (pin B7) */ |
362 | gpio_pin_config_t GPIO3_25_config = { |
363 | .direction = kGPIO_DigitalInput, |
364 | .outputLogic = 0U, |
365 | .interruptMode = kGPIO_NoIntmode |
366 | }; |
367 | /* Initialize GPIO functionality on GPIO_EMC_39 (pin B7) */ |
368 | GPIO_PinInit(GPIO3, 25U, &GPIO3_25_config); |
369 | |
370 | /* GPIO configuration of USER_BTN on WAKEUP (pin L6) */ |
371 | gpio_pin_config_t USER_BTN_config = { |
372 | .direction = kGPIO_DigitalInput, |
373 | .outputLogic = 0U, |
374 | .interruptMode = kGPIO_IntFallingEdge |
375 | }; |
376 | /* Initialize GPIO functionality on WAKEUP (pin L6) */ |
377 | GPIO_PinInit(GPIO5, 0U, &USER_BTN_config); |
378 | /* Enable GPIO pin interrupt on WAKEUP (pin L6) */ |
379 | GPIO_PortEnableInterrupts(GPIO5, 1U << 0U); |
380 | |
381 | /* GPIO configuration of GPIO5_01 on PMIC_ON_REQ (pin K7) */ |
382 | gpio_pin_config_t GPIO5_01_config = { |
383 | .direction = kGPIO_DigitalInput, |
384 | .outputLogic = 0U, |
385 | .interruptMode = kGPIO_NoIntmode |
386 | }; |
387 | /* Initialize GPIO functionality on PMIC_ON_REQ (pin K7) */ |
388 | GPIO_PinInit(GPIO5, 1U, &GPIO5_01_config); |
389 | |
390 | /* GPIO configuration of GPIO5_02 on PMIC_STBY_REQ (pin L7) */ |
391 | gpio_pin_config_t GPIO5_02_config = { |
392 | .direction = kGPIO_DigitalInput, |
393 | .outputLogic = 0U, |
394 | .interruptMode = kGPIO_NoIntmode |
395 | }; |
396 | /* Initialize GPIO functionality on PMIC_STBY_REQ (pin L7) */ |
397 | GPIO_PinInit(GPIO5, 2U, &GPIO5_02_config); |
398 | |
399 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_00_XBAR1_INOUT14, 0U); |
400 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_01_GPIO1_IO01, 0U); |
401 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_XBAR1_INOUT16, 0U); |
402 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_03_XBAR1_INOUT17, 0U); |
403 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0U); |
404 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_05_GPIO1_IO05, 0U); |
405 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, 0U); |
406 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_FLEXPWM1_PWMA03, 0U); |
407 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_11_WDOG1_WDOG_B, 0U); |
408 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U); |
409 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U); |
410 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_14_FLEXCAN2_TX, 0U); |
411 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL, 0U); |
412 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA, 0U); |
413 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_GPT2_CLK, 0U); |
414 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_GPT2_CAPTURE1, 0U); |
415 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_GPIO1_IO20, 0U); |
416 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_GPT2_COMPARE1, 0U); |
417 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_FLEXIO3_FLEXIO06, 0U); |
418 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_FLEXIO3_FLEXIO07, 0U); |
419 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_GPIO1_IO24, 0U); |
420 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26, 0U); |
421 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27, 0U); |
422 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_12_GPIO1_IO28, 0U); |
423 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_GPIO1_IO29, 0U); |
424 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_GPIO1_IO30, 0U); |
425 | IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_GPIO1_IO31, 0U); |
426 | IOMUXC_SetPinMux(IOMUXC_GPIO_B0_00_QTIMER1_TIMER0, 0U); |
427 | IOMUXC_SetPinMux(IOMUXC_GPIO_B0_01_QTIMER1_TIMER1, 0U); |
428 | IOMUXC_SetPinMux(IOMUXC_GPIO_B0_04_FLEXIO2_FLEXIO04, 0U); |
429 | IOMUXC_SetPinMux(IOMUXC_GPIO_B0_05_FLEXIO2_FLEXIO05, 0U); |
430 | IOMUXC_SetPinMux(IOMUXC_GPIO_B0_06_FLEXIO2_FLEXIO06, 0U); |
431 | IOMUXC_SetPinMux(IOMUXC_GPIO_B0_07_FLEXIO2_FLEXIO07, 0U); |
432 | IOMUXC_SetPinMux(IOMUXC_GPIO_B0_12_XBAR1_INOUT10, 0U); |
433 | IOMUXC_SetPinMux(IOMUXC_GPIO_B0_13_XBAR1_INOUT11, 0U); |
434 | IOMUXC_SetPinMux(IOMUXC_GPIO_B0_14_XBAR1_INOUT12, 0U); |
435 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_01_XBAR1_INOUT15, 0U); |
436 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0U); |
437 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0U); |
438 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_06_ENET_RX_EN, 0U); |
439 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_07_ENET_TX_DATA00, 0U); |
440 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_08_ENET_TX_DATA01, 0U); |
441 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_09_ENET_TX_EN, 0U); |
442 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_10_ENET_REF_CLK, 1U); |
443 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_11_ENET_RX_ER, 0U); |
444 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_14_FLEXIO3_FLEXIO30, 0U); |
445 | IOMUXC_SetPinMux(IOMUXC_GPIO_B1_15_FLEXIO3_FLEXIO31, 0U); |
446 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_00_FLEXIO1_FLEXIO00, 0U); |
447 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_01_FLEXIO1_FLEXIO01, 0U); |
448 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_02_XBAR1_INOUT04, 0U); |
449 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_03_XBAR1_INOUT05, 0U); |
450 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_04_XBAR1_INOUT06, 0U); |
451 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_05_XBAR1_INOUT07, 0U); |
452 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_06_XBAR1_INOUT08, 0U); |
453 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_10_FLEXCAN2_RX, 0U); |
454 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_12_XBAR1_IN24, 0U); |
455 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_13_FLEXPWM1_PWMB03, 0U); |
456 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_14_XBAR1_INOUT19, 0U); |
457 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_16_XBAR1_IN21, 0U); |
458 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_23_FLEXPWM1_PWMA00, 0U); |
459 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_24_FLEXPWM1_PWMB00, 0U); |
460 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_25_FLEXPWM1_PWMA01, 0U); |
461 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_26_FLEXPWM1_PWMB01, 0U); |
462 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_27_FLEXPWM1_PWMA02, 0U); |
463 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_28_FLEXPWM1_PWMB02, 0U); |
464 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_31_LPSPI1_PCS1, 0U); |
465 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_32_GPIO3_IO18, 0U); |
466 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_33_GPIO3_IO19, 0U); |
467 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_34_GPIO3_IO20, 0U); |
468 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_35_XBAR1_INOUT18, 0U); |
469 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_37_GPIO3_IO23, 0U); |
470 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_38_GPIO3_IO24, 0U); |
471 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_39_GPIO3_IO25, 0U); |
472 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_40_ENET_MDC, 0U); |
473 | IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_41_ENET_MDIO, 0U); |
474 | IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_LPSPI1_SCK, 0U); |
475 | IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_LPSPI1_PCS0, 0U); |
476 | IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_LPSPI1_SDO, 0U); |
477 | IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_LPSPI1_SDI, 0U); |
478 | IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_XBAR1_INOUT09, 0U); |
479 | IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_00_GPIO3_IO00, 0U); |
480 | IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_01_GPIO3_IO01, 0U); |
481 | IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_02_GPIO3_IO02, 0U); |
482 | IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_03_GPIO3_IO03, 0U); |
483 | IOMUXC_GPR->GPR26 = ((IOMUXC_GPR->GPR26 & |
484 | (~(BOARD_INITPINS_IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL_MASK))) |
485 | | IOMUXC_GPR_GPR26_GPIO_MUX1_GPIO_SEL(0x00U) |
486 | ); |
487 | IOMUXC_GPR->GPR28 = ((IOMUXC_GPR->GPR28 & |
488 | (~(BOARD_INITPINS_IOMUXC_GPR_GPR28_GPIO_MUX3_GPIO_SEL_MASK))) |
489 | | IOMUXC_GPR_GPR28_GPIO_MUX3_GPIO_SEL(0x00U) |
490 | ); |
491 | IOMUXC_GPR->GPR6 = ((IOMUXC_GPR->GPR6 & |
492 | (~(IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18_MASK | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19_MASK))) |
493 | | IOMUXC_GPR_GPR6_QTIMER1_TRM0_INPUT_SEL(0x00U) |
494 | | IOMUXC_GPR_GPR6_QTIMER1_TRM1_INPUT_SEL(0x00U) |
495 | | IOMUXC_GPR_GPR6_QTIMER1_TRM2_INPUT_SEL(0x01U) |
496 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_4(0x01U) |
497 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_5(0x01U) |
498 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_6(0x00U) |
499 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_7(0x01U) |
500 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_8(0x01U) |
501 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_9(0x01U) |
502 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_10(0x01U) |
503 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_11(0x01U) |
504 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_12(0x01U) |
505 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_14(0x01U) |
506 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_15(0x01U) |
507 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_16(0x00U) |
508 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_17(0x00U) |
509 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_18(0x01U) |
510 | | IOMUXC_GPR_GPR6_IOMUXC_XBAR_DIR_SEL_19(0x01U) |
511 | ); |
512 | IOMUXC_SetPinMux(IOMUXC_SNVS_PMIC_ON_REQ_GPIO5_IO01, 0U); |
513 | IOMUXC_SetPinMux(IOMUXC_SNVS_PMIC_STBY_REQ_GPIO5_IO02, 0U); |
514 | IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0U); |
515 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout06, kXBARA1_OutputDmaChMuxReq30); |
516 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn24, kXBARA1_OutputDmaChMuxReq31); |
517 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout06, kXBARA1_OutputAcmp2Sample); |
518 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputLogicHigh, kXBARA1_OutputFlexpwm1Fault0); |
519 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputLogicHigh, kXBARA1_OutputFlexpwm1Fault1); |
520 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputLogicHigh, kXBARA1_OutputFlexpwm1234Fault2); |
521 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputLogicHigh, kXBARA1_OutputFlexpwm1234Fault3); |
522 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputDmaDone1, kXBARA1_OutputIomuxXbarInout04); |
523 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputAcmp2Out, kXBARA1_OutputIomuxXbarInout05); |
524 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputAoi1Out3, kXBARA1_OutputIomuxXbarInout07); |
525 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout16, kXBARA1_OutputEnc1PhaseAInput); |
526 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout17, kXBARA1_OutputEnc1PhaseBInput); |
527 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout06, kXBARA1_OutputEnc1Index); |
528 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn24, kXBARA1_OutputEnc1Home); |
529 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarInout06, kXBARA1_OutputEnc1Trigger); |
530 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputPitTrigger3, kXBARA1_OutputIomuxXbarInout08); |
531 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputPitTrigger2, kXBARA1_OutputIomuxXbarInout09); |
532 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn21, kXBARA1_OutputQtimer1Tmr2Input); |
533 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputAoi1Out1, kXBARA1_OutputIomuxXbarInout10); |
534 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputPitTrigger1, kXBARA1_OutputIomuxXbarInout11); |
535 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputIomuxXbarIn21, kXBARA1_OutputLpspi1TrgInput); |
536 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputDmaDone0, kXBARA1_OutputIomuxXbarInout12); |
537 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputAoi1Out0, kXBARA1_OutputIomuxXbarInout14); |
538 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputPitTrigger0, kXBARA1_OutputIomuxXbarInout15); |
539 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputAoi1Out2, kXBARA1_OutputIomuxXbarInout18); |
540 | XBARA_SetSignalsConnection(XBARA1, kXBARA1_InputEnc1PosMatch, kXBARA1_OutputIomuxXbarInout19); |
541 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAcmp1Out, kXBARB2_OutputAoi1In00); |
542 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAcmp2Out, kXBARB2_OutputAoi1In01); |
543 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAcmp3Out, kXBARB2_OutputAoi1In02); |
544 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAcmp4Out, kXBARB2_OutputAoi1In03); |
545 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAdcEtcXbar0Coco0, kXBARB2_OutputAoi1In04); |
546 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAdcEtcXbar0Coco1, kXBARB2_OutputAoi1In05); |
547 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAdcEtcXbar0Coco2, kXBARB2_OutputAoi1In06); |
548 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAdcEtcXbar0Coco3, kXBARB2_OutputAoi1In07); |
549 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAdcEtcXbar1Coco0, kXBARB2_OutputAoi1In08); |
550 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAdcEtcXbar1Coco1, kXBARB2_OutputAoi1In09); |
551 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAdcEtcXbar1Coco2, kXBARB2_OutputAoi1In10); |
552 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputAdcEtcXbar1Coco3, kXBARB2_OutputAoi1In11); |
553 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputDmaDone0, kXBARB2_OutputAoi1In12); |
554 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputDmaDone1, kXBARB2_OutputAoi1In13); |
555 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputDmaDone2, kXBARB2_OutputAoi1In14); |
556 | XBARB_SetSignalsConnection(XBARB2, kXBARB2_InputDmaDone3, kXBARB2_OutputAoi1In15); |
557 | IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0xB0E9U); |
558 | IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0xB0E9U); |
559 | IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_06_ENET_RX_EN, 0xB0E9U); |
560 | IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_07_ENET_TX_DATA00, 0xB0E9U); |
561 | IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_08_ENET_TX_DATA01, 0xB0E9U); |
562 | IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_09_ENET_TX_EN, 0xB0E9U); |
563 | IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_10_ENET_REF_CLK, 0x31U); |
564 | IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_11_ENET_RX_ER, 0xB0E9U); |
565 | IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_40_ENET_MDC, 0xB0E9U); |
566 | IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_41_ENET_MDIO, 0xB829U); |
567 | } |
568 | |
569 | /*********************************************************************************************************************** |
570 | * EOF |
571 | **********************************************************************************************************************/ |
572 | |