1/*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2019 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8#include "fsl_pmu.h"
9
10/* Component ID definition, used by tools. */
11#ifndef FSL_COMPONENT_ID
12#define FSL_COMPONENT_ID "platform.drivers.pmu"
13#endif
14
15/*!
16 * name Status.
17 * {
18 */
19
20uint32_t PMU_GetStatusFlags(PMU_Type *base)
21{
22 uint32_t ret = 0U;
23
24 /* For 1P1. */
25 if (PMU_REG_1P1_OK_VDD1P1_MASK == (PMU_REG_1P1_OK_VDD1P1_MASK & base->REG_1P1))
26 {
27 ret |= (uint32_t)kPMU_1P1RegulatorOutputOK;
28 }
29 if (PMU_REG_1P1_BO_VDD1P1_MASK == (PMU_REG_1P1_BO_VDD1P1_MASK & base->REG_1P1))
30 {
31 ret |= (uint32_t)kPMU_1P1BrownoutOnOutput;
32 }
33
34 /* For 3P0. */
35 if (PMU_REG_3P0_OK_VDD3P0_MASK == (PMU_REG_3P0_OK_VDD3P0_MASK & base->REG_3P0))
36 {
37 ret |= (uint32_t)kPMU_3P0RegulatorOutputOK;
38 }
39 if (PMU_REG_3P0_BO_VDD3P0_MASK == (PMU_REG_3P0_BO_VDD3P0_MASK & base->REG_3P0))
40 {
41 ret |= (uint32_t)kPMU_3P0BrownoutOnOutput;
42 }
43
44 /* For 2P5. */
45 if (PMU_REG_2P5_OK_VDD2P5_MASK == (PMU_REG_2P5_OK_VDD2P5_MASK & base->REG_2P5))
46 {
47 ret |= (uint32_t)kPMU_2P5RegulatorOutputOK;
48 }
49 if (PMU_REG_2P5_BO_VDD2P5_MASK == (PMU_REG_2P5_BO_VDD2P5_MASK & base->REG_2P5))
50 {
51 ret |= (uint32_t)kPMU_2P5BrownoutOnOutput;
52 }
53
54 return ret;
55}
56