1 | /* |
2 | * Copyright 2020-2021 NXP |
3 | * All rights reserved. |
4 | * |
5 | * SPDX-License-Identifier: BSD-3-Clause |
6 | */ |
7 | |
8 | /*********************************************************************************************************************** |
9 | * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file |
10 | * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. |
11 | **********************************************************************************************************************/ |
12 | |
13 | #include "dcd.h" |
14 | |
15 | /* Component ID definition, used by tools. */ |
16 | #ifndef FSL_COMPONENT_ID |
17 | #define FSL_COMPONENT_ID "platform.drivers.xip_board" |
18 | #endif |
19 | |
20 | #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) |
21 | #if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1) |
22 | #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) |
23 | __attribute__((section(".boot_hdr.dcd_data"), used)) |
24 | #elif defined(__ICCARM__) |
25 | #pragma location = ".boot_hdr.dcd_data" |
26 | #endif |
27 | |
28 | /* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* |
29 | !!GlobalInfo |
30 | product: DCDx V2.0 |
31 | processor: MIMXRT1062xxxxA |
32 | package_id: MIMXRT1062DVL6A |
33 | mcu_data: ksdk2_0 |
34 | processor_version: 0.0.0 |
35 | board: MIMXRT1060-EVK |
36 | output_format: c_array |
37 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/ |
38 | /* COMMENTS BELOW ARE USED AS SETTINGS FOR DCD DATA */ |
39 | const uint8_t dcd_data[] = { |
40 | /* HEADER */ |
41 | /* Tag */ |
42 | 0xD2, |
43 | /* Image Length */ |
44 | 0x04, 0x10, |
45 | /* Version */ |
46 | 0x41, |
47 | |
48 | /* COMMANDS */ |
49 | |
50 | /* group: 'Imported Commands' */ |
51 | /* #1.1-113, command header bytes for merged 'Write - value' command */ |
52 | 0xCC, 0x03, 0x8C, 0x04, |
53 | /* #1.1, command: write_value, address: CCM_CCGR0, value: 0xFFFFFFFF, size: 4 */ |
54 | 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF, |
55 | /* #1.2, command: write_value, address: CCM_CCGR1, value: 0xFFFFFFFF, size: 4 */ |
56 | 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF, |
57 | /* #1.3, command: write_value, address: CCM_CCGR2, value: 0xFFFFFFFF, size: 4 */ |
58 | 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF, |
59 | /* #1.4, command: write_value, address: CCM_CCGR3, value: 0xFFFFFFFF, size: 4 */ |
60 | 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF, |
61 | /* #1.5, command: write_value, address: CCM_CCGR4, value: 0xFFFFFFFF, size: 4 */ |
62 | 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, |
63 | /* #1.6, command: write_value, address: CCM_CCGR5, value: 0xFFFFFFFF, size: 4 */ |
64 | 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF, |
65 | /* #1.7, command: write_value, address: CCM_CCGR6, value: 0xFFFFFFFF, size: 4 */ |
66 | 0x40, 0x0F, 0xC0, 0x80, 0xFF, 0xFF, 0xFF, 0xFF, |
67 | /* #1.8, command: write_value, address: CCM_ANALOG_PLL_SYS, value: 0x2001, size: 4 */ |
68 | 0x40, 0x0D, 0x80, 0x30, 0x00, 0x00, 0x20, 0x01, |
69 | /* #1.9, command: write_value, address: CCM_ANALOG_PFD_528, value: 0x101D101B, size: 4 */ |
70 | 0x40, 0x0D, 0x81, 0x00, 0x10, 0x1D, 0x10, 0x1B, |
71 | /* #1.10, command: write_value, address: CCM_CBCDR, value: 0x10D40, size: 4 */ |
72 | 0x40, 0x0F, 0xC0, 0x14, 0x00, 0x01, 0x0D, 0x40, |
73 | /* #1.11, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00, value: 0x00, size: 4 */ |
74 | 0x40, 0x1F, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00, |
75 | /* #1.12, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01, value: 0x00, size: 4 */ |
76 | 0x40, 0x1F, 0x80, 0x18, 0x00, 0x00, 0x00, 0x00, |
77 | /* #1.13, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02, value: 0x00, size: 4 */ |
78 | 0x40, 0x1F, 0x80, 0x1C, 0x00, 0x00, 0x00, 0x00, |
79 | /* #1.14, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03, value: 0x00, size: 4 */ |
80 | 0x40, 0x1F, 0x80, 0x20, 0x00, 0x00, 0x00, 0x00, |
81 | /* #1.15, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04, value: 0x00, size: 4 */ |
82 | 0x40, 0x1F, 0x80, 0x24, 0x00, 0x00, 0x00, 0x00, |
83 | /* #1.16, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05, value: 0x00, size: 4 */ |
84 | 0x40, 0x1F, 0x80, 0x28, 0x00, 0x00, 0x00, 0x00, |
85 | /* #1.17, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06, value: 0x00, size: 4 */ |
86 | 0x40, 0x1F, 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00, |
87 | /* #1.18, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07, value: 0x00, size: 4 */ |
88 | 0x40, 0x1F, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, |
89 | /* #1.19, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08, value: 0x00, size: 4 */ |
90 | 0x40, 0x1F, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00, |
91 | /* #1.20, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09, value: 0x00, size: 4 */ |
92 | 0x40, 0x1F, 0x80, 0x38, 0x00, 0x00, 0x00, 0x00, |
93 | /* #1.21, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10, value: 0x00, size: 4 */ |
94 | 0x40, 0x1F, 0x80, 0x3C, 0x00, 0x00, 0x00, 0x00, |
95 | /* #1.22, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11, value: 0x00, size: 4 */ |
96 | 0x40, 0x1F, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, |
97 | /* #1.23, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12, value: 0x00, size: 4 */ |
98 | 0x40, 0x1F, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00, |
99 | /* #1.24, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13, value: 0x00, size: 4 */ |
100 | 0x40, 0x1F, 0x80, 0x48, 0x00, 0x00, 0x00, 0x00, |
101 | /* #1.25, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14, value: 0x00, size: 4 */ |
102 | 0x40, 0x1F, 0x80, 0x4C, 0x00, 0x00, 0x00, 0x00, |
103 | /* #1.26, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15, value: 0x00, size: 4 */ |
104 | 0x40, 0x1F, 0x80, 0x50, 0x00, 0x00, 0x00, 0x00, |
105 | /* #1.27, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16, value: 0x00, size: 4 */ |
106 | 0x40, 0x1F, 0x80, 0x54, 0x00, 0x00, 0x00, 0x00, |
107 | /* #1.28, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17, value: 0x00, size: 4 */ |
108 | 0x40, 0x1F, 0x80, 0x58, 0x00, 0x00, 0x00, 0x00, |
109 | /* #1.29, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18, value: 0x00, size: 4 */ |
110 | 0x40, 0x1F, 0x80, 0x5C, 0x00, 0x00, 0x00, 0x00, |
111 | /* #1.30, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19, value: 0x00, size: 4 */ |
112 | 0x40, 0x1F, 0x80, 0x60, 0x00, 0x00, 0x00, 0x00, |
113 | /* #1.31, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20, value: 0x00, size: 4 */ |
114 | 0x40, 0x1F, 0x80, 0x64, 0x00, 0x00, 0x00, 0x00, |
115 | /* #1.32, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21, value: 0x00, size: 4 */ |
116 | 0x40, 0x1F, 0x80, 0x68, 0x00, 0x00, 0x00, 0x00, |
117 | /* #1.33, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22, value: 0x00, size: 4 */ |
118 | 0x40, 0x1F, 0x80, 0x6C, 0x00, 0x00, 0x00, 0x00, |
119 | /* #1.34, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23, value: 0x00, size: 4 */ |
120 | 0x40, 0x1F, 0x80, 0x70, 0x00, 0x00, 0x00, 0x00, |
121 | /* #1.35, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24, value: 0x00, size: 4 */ |
122 | 0x40, 0x1F, 0x80, 0x74, 0x00, 0x00, 0x00, 0x00, |
123 | /* #1.36, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25, value: 0x00, size: 4 */ |
124 | 0x40, 0x1F, 0x80, 0x78, 0x00, 0x00, 0x00, 0x00, |
125 | /* #1.37, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26, value: 0x00, size: 4 */ |
126 | 0x40, 0x1F, 0x80, 0x7C, 0x00, 0x00, 0x00, 0x00, |
127 | /* #1.38, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27, value: 0x00, size: 4 */ |
128 | 0x40, 0x1F, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, |
129 | /* #1.39, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28, value: 0x00, size: 4 */ |
130 | 0x40, 0x1F, 0x80, 0x84, 0x00, 0x00, 0x00, 0x00, |
131 | /* #1.40, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29, value: 0x00, size: 4 */ |
132 | 0x40, 0x1F, 0x80, 0x88, 0x00, 0x00, 0x00, 0x00, |
133 | /* #1.41, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30, value: 0x00, size: 4 */ |
134 | 0x40, 0x1F, 0x80, 0x8C, 0x00, 0x00, 0x00, 0x00, |
135 | /* #1.42, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31, value: 0x00, size: 4 */ |
136 | 0x40, 0x1F, 0x80, 0x90, 0x00, 0x00, 0x00, 0x00, |
137 | /* #1.43, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32, value: 0x00, size: 4 */ |
138 | 0x40, 0x1F, 0x80, 0x94, 0x00, 0x00, 0x00, 0x00, |
139 | /* #1.44, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33, value: 0x00, size: 4 */ |
140 | 0x40, 0x1F, 0x80, 0x98, 0x00, 0x00, 0x00, 0x00, |
141 | /* #1.45, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34, value: 0x00, size: 4 */ |
142 | 0x40, 0x1F, 0x80, 0x9C, 0x00, 0x00, 0x00, 0x00, |
143 | /* #1.46, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35, value: 0x00, size: 4 */ |
144 | 0x40, 0x1F, 0x80, 0xA0, 0x00, 0x00, 0x00, 0x00, |
145 | /* #1.47, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36, value: 0x00, size: 4 */ |
146 | 0x40, 0x1F, 0x80, 0xA4, 0x00, 0x00, 0x00, 0x00, |
147 | /* #1.48, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37, value: 0x00, size: 4 */ |
148 | 0x40, 0x1F, 0x80, 0xA8, 0x00, 0x00, 0x00, 0x00, |
149 | /* #1.49, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38, value: 0x00, size: 4 */ |
150 | 0x40, 0x1F, 0x80, 0xAC, 0x00, 0x00, 0x00, 0x00, |
151 | /* #1.50, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39, value: 0x10, size: 4 */ |
152 | 0x40, 0x1F, 0x80, 0xB0, 0x00, 0x00, 0x00, 0x10, |
153 | /* #1.51, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00, value: 0x110F9, size: 4 */ |
154 | 0x40, 0x1F, 0x82, 0x04, 0x00, 0x01, 0x10, 0xF9, |
155 | /* #1.52, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01, value: 0x110F9, size: 4 */ |
156 | 0x40, 0x1F, 0x82, 0x08, 0x00, 0x01, 0x10, 0xF9, |
157 | /* #1.53, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02, value: 0x110F9, size: 4 */ |
158 | 0x40, 0x1F, 0x82, 0x0C, 0x00, 0x01, 0x10, 0xF9, |
159 | /* #1.54, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03, value: 0x110F9, size: 4 */ |
160 | 0x40, 0x1F, 0x82, 0x10, 0x00, 0x01, 0x10, 0xF9, |
161 | /* #1.55, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04, value: 0x110F9, size: 4 */ |
162 | 0x40, 0x1F, 0x82, 0x14, 0x00, 0x01, 0x10, 0xF9, |
163 | /* #1.56, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05, value: 0x110F9, size: 4 */ |
164 | 0x40, 0x1F, 0x82, 0x18, 0x00, 0x01, 0x10, 0xF9, |
165 | /* #1.57, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06, value: 0x110F9, size: 4 */ |
166 | 0x40, 0x1F, 0x82, 0x1C, 0x00, 0x01, 0x10, 0xF9, |
167 | /* #1.58, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07, value: 0x110F9, size: 4 */ |
168 | 0x40, 0x1F, 0x82, 0x20, 0x00, 0x01, 0x10, 0xF9, |
169 | /* #1.59, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08, value: 0x110F9, size: 4 */ |
170 | 0x40, 0x1F, 0x82, 0x24, 0x00, 0x01, 0x10, 0xF9, |
171 | /* #1.60, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09, value: 0x110F9, size: 4 */ |
172 | 0x40, 0x1F, 0x82, 0x28, 0x00, 0x01, 0x10, 0xF9, |
173 | /* #1.61, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10, value: 0x110F9, size: 4 */ |
174 | 0x40, 0x1F, 0x82, 0x2C, 0x00, 0x01, 0x10, 0xF9, |
175 | /* #1.62, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11, value: 0x110F9, size: 4 */ |
176 | 0x40, 0x1F, 0x82, 0x30, 0x00, 0x01, 0x10, 0xF9, |
177 | /* #1.63, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12, value: 0x110F9, size: 4 */ |
178 | 0x40, 0x1F, 0x82, 0x34, 0x00, 0x01, 0x10, 0xF9, |
179 | /* #1.64, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13, value: 0x110F9, size: 4 */ |
180 | 0x40, 0x1F, 0x82, 0x38, 0x00, 0x01, 0x10, 0xF9, |
181 | /* #1.65, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14, value: 0x110F9, size: 4 */ |
182 | 0x40, 0x1F, 0x82, 0x3C, 0x00, 0x01, 0x10, 0xF9, |
183 | /* #1.66, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15, value: 0x110F9, size: 4 */ |
184 | 0x40, 0x1F, 0x82, 0x40, 0x00, 0x01, 0x10, 0xF9, |
185 | /* #1.67, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16, value: 0x110F9, size: 4 */ |
186 | 0x40, 0x1F, 0x82, 0x44, 0x00, 0x01, 0x10, 0xF9, |
187 | /* #1.68, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17, value: 0x110F9, size: 4 */ |
188 | 0x40, 0x1F, 0x82, 0x48, 0x00, 0x01, 0x10, 0xF9, |
189 | /* #1.69, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18, value: 0x110F9, size: 4 */ |
190 | 0x40, 0x1F, 0x82, 0x4C, 0x00, 0x01, 0x10, 0xF9, |
191 | /* #1.70, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19, value: 0x110F9, size: 4 */ |
192 | 0x40, 0x1F, 0x82, 0x50, 0x00, 0x01, 0x10, 0xF9, |
193 | /* #1.71, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20, value: 0x110F9, size: 4 */ |
194 | 0x40, 0x1F, 0x82, 0x54, 0x00, 0x01, 0x10, 0xF9, |
195 | /* #1.72, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21, value: 0x110F9, size: 4 */ |
196 | 0x40, 0x1F, 0x82, 0x58, 0x00, 0x01, 0x10, 0xF9, |
197 | /* #1.73, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22, value: 0x110F9, size: 4 */ |
198 | 0x40, 0x1F, 0x82, 0x5C, 0x00, 0x01, 0x10, 0xF9, |
199 | /* #1.74, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23, value: 0x110F9, size: 4 */ |
200 | 0x40, 0x1F, 0x82, 0x60, 0x00, 0x01, 0x10, 0xF9, |
201 | /* #1.75, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24, value: 0x110F9, size: 4 */ |
202 | 0x40, 0x1F, 0x82, 0x64, 0x00, 0x01, 0x10, 0xF9, |
203 | /* #1.76, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25, value: 0x110F9, size: 4 */ |
204 | 0x40, 0x1F, 0x82, 0x68, 0x00, 0x01, 0x10, 0xF9, |
205 | /* #1.77, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26, value: 0x110F9, size: 4 */ |
206 | 0x40, 0x1F, 0x82, 0x6C, 0x00, 0x01, 0x10, 0xF9, |
207 | /* #1.78, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27, value: 0x110F9, size: 4 */ |
208 | 0x40, 0x1F, 0x82, 0x70, 0x00, 0x01, 0x10, 0xF9, |
209 | /* #1.79, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28, value: 0x110F9, size: 4 */ |
210 | 0x40, 0x1F, 0x82, 0x74, 0x00, 0x01, 0x10, 0xF9, |
211 | /* #1.80, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29, value: 0x110F9, size: 4 */ |
212 | 0x40, 0x1F, 0x82, 0x78, 0x00, 0x01, 0x10, 0xF9, |
213 | /* #1.81, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30, value: 0x110F9, size: 4 */ |
214 | 0x40, 0x1F, 0x82, 0x7C, 0x00, 0x01, 0x10, 0xF9, |
215 | /* #1.82, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31, value: 0x110F9, size: 4 */ |
216 | 0x40, 0x1F, 0x82, 0x80, 0x00, 0x01, 0x10, 0xF9, |
217 | /* #1.83, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32, value: 0x110F9, size: 4 */ |
218 | 0x40, 0x1F, 0x82, 0x84, 0x00, 0x01, 0x10, 0xF9, |
219 | /* #1.84, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33, value: 0x110F9, size: 4 */ |
220 | 0x40, 0x1F, 0x82, 0x88, 0x00, 0x01, 0x10, 0xF9, |
221 | /* #1.85, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34, value: 0x110F9, size: 4 */ |
222 | 0x40, 0x1F, 0x82, 0x8C, 0x00, 0x01, 0x10, 0xF9, |
223 | /* #1.86, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35, value: 0x110F9, size: 4 */ |
224 | 0x40, 0x1F, 0x82, 0x90, 0x00, 0x01, 0x10, 0xF9, |
225 | /* #1.87, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36, value: 0x110F9, size: 4 */ |
226 | 0x40, 0x1F, 0x82, 0x94, 0x00, 0x01, 0x10, 0xF9, |
227 | /* #1.88, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37, value: 0x110F9, size: 4 */ |
228 | 0x40, 0x1F, 0x82, 0x98, 0x00, 0x01, 0x10, 0xF9, |
229 | /* #1.89, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38, value: 0x110F9, size: 4 */ |
230 | 0x40, 0x1F, 0x82, 0x9C, 0x00, 0x01, 0x10, 0xF9, |
231 | /* #1.90, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39, value: 0x110F9, size: 4 */ |
232 | 0x40, 0x1F, 0x82, 0xA0, 0x00, 0x01, 0x10, 0xF9, |
233 | /* #1.91, command: write_value, address: SEMC_MCR, value: 0x10000004, size: 4 */ |
234 | 0x40, 0x2F, 0x00, 0x00, 0x10, 0x00, 0x00, 0x04, |
235 | /* #1.92, command: write_value, address: SEMC_BMCR0, value: 0x81, size: 4 */ |
236 | 0x40, 0x2F, 0x00, 0x08, 0x00, 0x00, 0x00, 0x81, |
237 | /* #1.93, command: write_value, address: SEMC_BMCR1, value: 0x81, size: 4 */ |
238 | 0x40, 0x2F, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x81, |
239 | /* #1.94, command: write_value, address: SEMC_BR0, value: 0x8000001B, size: 4 */ |
240 | 0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x1B, |
241 | /* #1.95, command: write_value, address: SEMC_BR1, value: 0x8200001B, size: 4 */ |
242 | 0x40, 0x2F, 0x00, 0x14, 0x82, 0x00, 0x00, 0x1B, |
243 | /* #1.96, command: write_value, address: SEMC_BR2, value: 0x8400001B, size: 4 */ |
244 | 0x40, 0x2F, 0x00, 0x18, 0x84, 0x00, 0x00, 0x1B, |
245 | /* #1.97, command: write_value, address: SEMC_BR3, value: 0x8600001B, size: 4 */ |
246 | 0x40, 0x2F, 0x00, 0x1C, 0x86, 0x00, 0x00, 0x1B, |
247 | /* #1.98, command: write_value, address: SEMC_BR4, value: 0x90000021, size: 4 */ |
248 | 0x40, 0x2F, 0x00, 0x20, 0x90, 0x00, 0x00, 0x21, |
249 | /* #1.99, command: write_value, address: SEMC_BR5, value: 0xA0000019, size: 4 */ |
250 | 0x40, 0x2F, 0x00, 0x24, 0xA0, 0x00, 0x00, 0x19, |
251 | /* #1.100, command: write_value, address: SEMC_BR6, value: 0xA8000017, size: 4 */ |
252 | 0x40, 0x2F, 0x00, 0x28, 0xA8, 0x00, 0x00, 0x17, |
253 | /* #1.101, command: write_value, address: SEMC_BR7, value: 0xA900001B, size: 4 */ |
254 | 0x40, 0x2F, 0x00, 0x2C, 0xA9, 0x00, 0x00, 0x1B, |
255 | /* #1.102, command: write_value, address: SEMC_BR8, value: 0x21, size: 4 */ |
256 | 0x40, 0x2F, 0x00, 0x30, 0x00, 0x00, 0x00, 0x21, |
257 | /* #1.103, command: write_value, address: SEMC_IOCR, value: 0x79A8, size: 4 */ |
258 | 0x40, 0x2F, 0x00, 0x04, 0x00, 0x00, 0x79, 0xA8, |
259 | /* #1.104, command: write_value, address: SEMC_SDRAMCR0, value: 0xF31, size: 4 */ |
260 | 0x40, 0x2F, 0x00, 0x40, 0x00, 0x00, 0x0F, 0x31, |
261 | /* #1.105, command: write_value, address: SEMC_SDRAMCR1, value: 0x652922, size: 4 */ |
262 | 0x40, 0x2F, 0x00, 0x44, 0x00, 0x65, 0x29, 0x22, |
263 | /* #1.106, command: write_value, address: SEMC_SDRAMCR2, value: 0x10920, size: 4 */ |
264 | 0x40, 0x2F, 0x00, 0x48, 0x00, 0x01, 0x09, 0x20, |
265 | /* #1.107, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A08, size: 4 */ |
266 | 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x08, |
267 | /* #1.108, command: write_value, address: SEMC_DBICR0, value: 0x21, size: 4 */ |
268 | 0x40, 0x2F, 0x00, 0x80, 0x00, 0x00, 0x00, 0x21, |
269 | /* #1.109, command: write_value, address: SEMC_DBICR1, value: 0x888888, size: 4 */ |
270 | 0x40, 0x2F, 0x00, 0x84, 0x00, 0x88, 0x88, 0x88, |
271 | /* #1.110, command: write_value, address: SEMC_IPCR1, value: 0x02, size: 4 */ |
272 | 0x40, 0x2F, 0x00, 0x94, 0x00, 0x00, 0x00, 0x02, |
273 | /* #1.111, command: write_value, address: SEMC_IPCR2, value: 0x00, size: 4 */ |
274 | 0x40, 0x2F, 0x00, 0x98, 0x00, 0x00, 0x00, 0x00, |
275 | /* #1.112, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ |
276 | 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, |
277 | /* #1.113, command: write_value, address: SEMC_IPCMD, value: 0xA55A000F, size: 4 */ |
278 | 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0F, |
279 | /* #2, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ |
280 | 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, |
281 | /* #3.1-2, command header bytes for merged 'Write - value' command */ |
282 | 0xCC, 0x00, 0x14, 0x04, |
283 | /* #3.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ |
284 | 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, |
285 | /* #3.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */ |
286 | 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, |
287 | /* #4, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ |
288 | 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, |
289 | /* #5.1-2, command header bytes for merged 'Write - value' command */ |
290 | 0xCC, 0x00, 0x14, 0x04, |
291 | /* #5.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ |
292 | 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, |
293 | /* #5.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */ |
294 | 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C, |
295 | /* #6, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ |
296 | 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, |
297 | /* #7.1-3, command header bytes for merged 'Write - value' command */ |
298 | 0xCC, 0x00, 0x1C, 0x04, |
299 | /* #7.1, command: write_value, address: SEMC_IPTXDAT, value: 0x33, size: 4 */ |
300 | 0x40, 0x2F, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x33, |
301 | /* #7.2, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */ |
302 | 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00, |
303 | /* #7.3, command: write_value, address: SEMC_IPCMD, value: 0xA55A000A, size: 4 */ |
304 | 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0A, |
305 | /* #8, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */ |
306 | 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, |
307 | /* #9, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A09, size: 4 */ |
308 | 0xCC, 0x00, 0x0C, 0x04, 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x09 |
309 | }; |
310 | /* BE CAREFUL MODIFYING THIS SETTINGS - IT IS YAML SETTINGS FOR TOOLS */ |
311 | |
312 | #else |
313 | const uint8_t dcd_data[] = {0x00}; |
314 | #endif /* XIP_BOOT_HEADER_DCD_ENABLE */ |
315 | #endif /* XIP_BOOT_HEADER_ENABLE */ |
316 | |