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/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2019 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_pmu.h"
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/* Component ID definition, used by tools. */
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#ifndef
FSL_COMPONENT_ID
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#define
FSL_COMPONENT_ID
"platform.drivers.pmu"
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#endif
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/*!
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* name Status.
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* {
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*/
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uint32_t
PMU_GetStatusFlags
(
PMU_Type
*
base
)
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{
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uint32_t
ret
= 0U;
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/* For 1P1. */
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if
(
PMU_REG_1P1_OK_VDD1P1_MASK
==
(
PMU_REG_1P1_OK_VDD1P1_MASK
&
base
->
REG_1P1
))
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{
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ret
|=
(
uint32_t
)
kPMU_1P1RegulatorOutputOK
;
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}
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if
(
PMU_REG_1P1_BO_VDD1P1_MASK
==
(
PMU_REG_1P1_BO_VDD1P1_MASK
&
base
->
REG_1P1
))
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{
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ret
|=
(
uint32_t
)
kPMU_1P1BrownoutOnOutput
;
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}
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/* For 3P0. */
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if
(
PMU_REG_3P0_OK_VDD3P0_MASK
==
(
PMU_REG_3P0_OK_VDD3P0_MASK
&
base
->
REG_3P0
))
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{
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ret
|=
(
uint32_t
)
kPMU_3P0RegulatorOutputOK
;
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}
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if
(
PMU_REG_3P0_BO_VDD3P0_MASK
==
(
PMU_REG_3P0_BO_VDD3P0_MASK
&
base
->
REG_3P0
))
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{
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ret
|=
(
uint32_t
)
kPMU_3P0BrownoutOnOutput
;
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}
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/* For 2P5. */
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if
(
PMU_REG_2P5_OK_VDD2P5_MASK
==
(
PMU_REG_2P5_OK_VDD2P5_MASK
&
base
->
REG_2P5
))
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{
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ret
|=
(
uint32_t
)
kPMU_2P5RegulatorOutputOK
;
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}
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if
(
PMU_REG_2P5_BO_VDD2P5_MASK
==
(
PMU_REG_2P5_BO_VDD2P5_MASK
&
base
->
REG_2P5
))
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{
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ret
|=
(
uint32_t
)
kPMU_2P5BrownoutOnOutput
;
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}
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return
ret
;
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}
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