// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright 2020 NXP * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ /dts-v1/; #include "imx8mp-evk.dts" &i2c3 { clock-frequency = <400000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; /delete-node/ov5640_mipi@3c; pca9849: pca9849@71 { compatible = "nxp,pca9849"; reg = <0x71>; #address-cells = <1>; #size-cells = <0>; status = "okay"; powerdown-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; reset = <&gpio3 19 GPIO_ACTIVE_HIGH>; i2c_0: i2c_0@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; status = "okay"; imx219_0: imx219_0@10 { compatible = "sony,imx219"; reg = <0x10>; pinctrl-names = "default"; /*pinctrl-0 = <&pinctrl_csi0_pwn>, <&pinctrl_csi0_rst>, <&pinctrl_csi0_mclk>;*/ pinctrl-0 = <&pinctrl_csi0_pwn>; clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; clock-names = "xclk"; assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; assigned-clock-parents = <&clk IMX8MP_CLK_24M>; assigned-clock-rates = <24000000>; csi_id = <0>; pwdn-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; mclk = <24000000>; mclk_source = <0>; mipi_csi; status = "okay"; port { imx219_mipi_ep_0: endpoint { remote-endpoint = <&mipi_csi_ep_0>; data-lanes = <1 2>; clock-lanes = <0>; clock-noncontinuous; max-pixel-frequency = /bits/ 64 <266000000>; }; }; }; }; i2c_1: i2c_1@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; status = "okay"; imx219_1: imx219_1@10 { compatible = "sony,imx219"; reg = <0x10>; pinctrl-names = "default"; /*pinctrl-0 = <&pinctrl_csi1_pwn>, <&pinctrl_csi0_rst>, <&pinctrl_csi1_mclk>;*/ pinctrl-0 = <&pinctrl_csi1_pwn>; clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; clock-names = "xclk"; assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; assigned-clock-parents = <&clk IMX8MP_CLK_24M>; assigned-clock-rates = <24000000>; csi_id = <0>; pwdn-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; mclk = <24000000>; mclk_source = <0>; mipi_csi; status = "okay"; port { imx219_mipi_ep_1: endpoint { remote-endpoint = <&mipi_csi_ep_1>; data-lanes = <1 2>; clock-noncontinuous; clock-lanes = <0>; max-pixel-frequency = /bits/ 64 <266000000>; }; }; }; }; i2c_2: i2c_2@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; status = "okay"; imx219_2: imx219_2@10 { compatible = "sony,imx219"; reg = <0x10>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_csi2_pwn>, <&pinctrl_csi2_rst>, <&pinctrl_csi2_mclk>; clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; clock-names = "xclk"; assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; assigned-clock-parents = <&clk IMX8MP_CLK_24M>; assigned-clock-rates = <24000000>; csi_id = <1>; pwdn-gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; mclk = <24000000>; mclk_source = <0>; mipi_csi; status = "okay"; port { imx219_mipi_ep_2: endpoint { remote-endpoint = <&mipi_csi_ep_2>; data-lanes = <1 2>; clock-lanes = <0>; clock-noncontinuous; max-pixel-frequency = /bits/ 64 <266000000>; }; }; }; }; i2c_3: i2c_3@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; status = "okay"; imx219_3: imx219_3@10 { compatible = "sony,imx219"; reg = <0x10>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_csi3_pwn>, <&pinctrl_csi3_rst>, <&pinctrl_csi3_mclk>; clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; clock-names = "xclk"; assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO2>; assigned-clock-parents = <&clk IMX8MP_CLK_24M>; assigned-clock-rates = <24000000>; csi_id = <1>; pwdn-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; mclk = <24000000>; mclk_source = <0>; mipi_csi; status = "okay"; port { imx219_mipi_ep_3: endpoint { remote-endpoint = <&mipi_csi_ep_3>; data-lanes = <1 2>; clock-lanes = <0>; clock-noncontinuous; max-pixel-frequency = /bits/ 64 <266000000>; }; }; }; }; }; }; &cameradev { status = "okay"; }; &isi_0 { status = "disabled"; }; &isi_1 { status = "disabled"; }; &isp_0 { status = "okay"; }; &isp_1 { status = "okay"; }; &dewarp { status = "okay"; }; &mipi_csi_0 { #address-cells = <1>; #size-cells = <0>; status = "okay"; clock-frequency = <266000000>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; assigned-clock-rates = <266000000>; port@0 { reg = <0>; mipi_csi_ep_0: endpoint { remote-endpoint = <&imx219_mipi_ep_0>; data-lanes = <2>; csis-hs-settle = <16>; csis-clk-settle = <2>; csis-wclk; }; }; port@1 { reg = <1>; mipi_csi_ep_1: endpoint { remote-endpoint = <&imx219_mipi_ep_1>; data-lanes = <2>; csis-hs-settle = <16>; csis-clk-settle = <2>; csis-wclk; }; }; }; &i2c2 { /delete-node/ov5640_mipi@3c; }; &mipi_csi_1 { #address-cells = <1>; #size-cells = <0>; status = "okay"; clock-frequency = <266000000>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; assigned-clock-rates = <266000000>; port@2 { reg = <2>; mipi_csi_ep_2: endpoint { remote-endpoint = <&imx219_mipi_ep_2>; data-lanes = <2>; csis-hs-settle = <16>; csis-clk-settle = <2>; csis-wclk; }; }; port@3 { reg = <3>; mipi_csi_ep_3: endpoint { remote-endpoint = <&imx219_mipi_ep_3>; data-lanes = <2>; csis-hs-settle = <16>; csis-clk-settle = <2>; csis-wclk; }; }; };