/* * iMX8MM target - linux-demo * * Copyright 2019 NXP * * Authors: * Peng Fan * * This work is licensed under the terms of the GNU GPL, version 2. See * the COPYING file in the top-level directory. */ /* * Boot 2nd Linux cmdline: * export PATH=$PATH:/usr/share/jailhouse/tools/ * jailhouse cell linux imx8mp-linux-demo.cell Image -d imx8mp-evk-inmate.dtb -c "clk_ignore_unused console=ttymxc3,115200 earlycon=ec_imx6q,0x30890000,115200 root=/dev/mmcblk2p2 rootwait rw" */ #include #include struct { struct jailhouse_cell_desc cell; __u64 cpus[1]; struct jailhouse_memory mem_regions[21]; struct jailhouse_irqchip irqchips[2]; struct jailhouse_pci_device pci_devices[2]; } __attribute__((packed)) config = { .cell = { .signature = JAILHOUSE_CELL_DESC_SIGNATURE, .revision = JAILHOUSE_CONFIG_REVISION, .name = "linux-inmate-demo", .flags = JAILHOUSE_CELL_PASSIVE_COMMREG, .cpu_set_size = sizeof(config.cpus), .num_memory_regions = ARRAY_SIZE(config.mem_regions), .num_irqchips = ARRAY_SIZE(config.irqchips), .num_pci_devices = ARRAY_SIZE(config.pci_devices), .vpci_irq_base = 154, /* Not include 32 base */ }, .cpus = { 0xc, }, .mem_regions = { /* IVHSMEM shared memory region for 00:00.0 (demo )*/ { .phys_start = 0xfd900000, .virt_start = 0xfd900000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0xfd901000, .virt_start = 0xfd901000, .size = 0x9000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0xfd90a000, .virt_start = 0xfd90a000, .size = 0x2000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0xfd90c000, .virt_start = 0xfd90c000, .size = 0x2000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_ROOTSHARED, }, { .phys_start = 0xfd90e000, .virt_start = 0xfd90e000, .size = 0x2000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_ROOTSHARED, }, /* IVSHMEM shared memory regions for 00:01.0 (networking) */ JAILHOUSE_SHMEM_NET_REGIONS(0xfda00000, 1), /* UART2 earlycon */ { .phys_start = 0x30890000, .virt_start = 0x30890000, .size = 0x1000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED, }, /* I2C3 */ { .phys_start = 0x30a40000, .virt_start = 0x30a40000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* UART4 */ { .phys_start = 0x30a60000, .virt_start = 0x30a60000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* SHDC3 */ { .phys_start = 0x30b60000, .virt_start = 0x30b60000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* MIPI_DSI */ { .phys_start = 0x32e60000, .virt_start = 0x32e60000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* LCDIF1 */ { .phys_start = 0x32e80000, .virt_start = 0x32e80000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* PINCTRL */ { .phys_start = 0x30330000, .virt_start = 0x30330000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* MEDIAMX_BLK_CTRL */ { .phys_start = 0x32ec0000, .virt_start = 0x32ec0000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* GPIO-5 */ { .phys_start = 0x30240000, .virt_start = 0x30240000, .size = 0x10000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO, }, /* RAM: Top at 4GB Space */ { .phys_start = 0xfdb00000, .virt_start = 0, .size = 0x10000, /* 64KB */ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE, }, /* RAM */ { /* * We could not use 0x80000000 which conflicts with * COMM_REGION_BASE */ .phys_start = 0xc0000000, .virt_start = 0xc0000000, .size = 0x3d700000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA | JAILHOUSE_MEM_LOADABLE, }, /* communication region */ { .virt_start = 0x80000000, .size = 0x00001000, .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_COMM_REGION, }, }, .irqchips = { /* uart2/sdhc1 */ { .address = 0x38800000, .pin_base = 32, .pin_bitmap = { (1 << (24 + 32 - 32)) | (1 << (29 + 32 - 32)) }, }, /* IVSHMEM */ { .address = 0x38800000, .pin_base = 160, .pin_bitmap = { 0xf << (154 + 32 - 160) /* SPI 154-157 */ }, }, }, .pci_devices = { { /* IVSHMEM 00:00.0 (demo) */ .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 0, .bdf = 0 << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, .shmem_regions_start = 0, .shmem_dev_id = 2, .shmem_peers = 3, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_UNDEFINED, }, { /* IVSHMEM 00:01.0 (networking) */ .type = JAILHOUSE_PCI_TYPE_IVSHMEM, .domain = 0, .bdf = 1 << 3, .bar_mask = JAILHOUSE_IVSHMEM_BAR_MASK_INTX, .shmem_regions_start = 5, .shmem_dev_id = 1, .shmem_peers = 2, .shmem_protocol = JAILHOUSE_SHMEM_PROTO_VETH, }, }, };