• MC56F8355MFGE

    Hello,   I use the MC56F8355MFGE DSP. I program it with the 56800E Flash Programmer. A DSP with 1628 datecode is ok after programming. A DSP with 1843 datecode doesn't start after programming. The checksum fo...
    CHRISTOPHE CHEVE
    last modified by CHRISTOPHE CHEVE
  • Voltage drop every adc trigger

    Currently I am using LPC5528, I have to do 1M sample/s ADC sampling continuously, keep streaming out the value.   I attach 96M HF clock to adc with divider = 4, STS = 3, 16bit resolution. loop cnt = 15, it will...
    Francis Yeung
    last modified by Francis Yeung
  • fatfs sd

    hello,       is  there  the example of Fatfs ?   (fatfs + sd +spi  on mpc5744)
    xiaobo zheng
    last modified by xiaobo zheng
  • How to set external RTC in kernel

    Hi  Some days ago,I asked a question about RTC RTC always reset to 19700101   After investigation, I find it can not register the external RTC (BM8563ESA, I2C RTC) if I close all the on-cpu RTC i...
    铭恒 李
    last modified by 铭恒 李
  • Bit mask does not work with 64bit variable

    If we configure in Freemaster 3.0.3.6 a bitmask to a 8byte (64bit) variable, it doesen't work. The bitmask has no effect to the value.   Best Regards, Martin
    martinrieser
    last modified by martinrieser
  • STATUS_ERROR on CSEC_DRV_LoadPlainKey

    I am debugging the example csec_keyconfig_s32k116 to understand how CSEc and AES 128 encryption works. But I am seeing that CSEC_DRV_LoadPlainKey() function always returns STATUS_ERROR. Regardless of whether it is cal...
    Juan Manuel
    last modified by Juan Manuel
  • zeus-5.4.24-2.1.0 won't boot on my IMX8MNEVK board

    Hi!   I'm trying to get the 5.4.24-2.1.0 release to run on my IMX8MNEVK board but I get the following error when trying to boot the image:   U-Boot SPL 2020.04-5.4.24-2.1.0+g4979a99482 (Jul 07 20...
    Simon Pettersson
    last modified by Simon Pettersson
  • i.MX8MQ is hanging in busfreq-imx8mq.c driver

    Hi NXP Team,   We are trying to port the i.MX8MQ custom board to Linux kernel 5.4.3. We are using the 5.4.3 kernel provided by the NXP team.   Please note that on the same board, previous version 4.7 is wo...
    Harshit Shah
    last modified by Harshit Shah
  • S32K144 FlexNVM

    FlexNVM as E-Flash: As shown in the figure above, Data retention is only 5 years, and data retention can be restarted by refreshing the data, so my question is,if one data in FLEXNVM is refreshed, the data retentio...
  • Zero copy between GPU and VPU

    I am trying to take physical buffers from the imxvpudec gstreamer element, and modify them using the GPU with GLES and EGL, before passing them to the VPU encoder with imxvpuenc_h264.     For passing the me...
    Erlend Eriksen
    last modified by Erlend Eriksen
  • imx7d using dma to transfer eim data

    Hello everyone my development board is IMX7DSABRE. Linux kernel version is 4.9.88. When I use dma to transmit EIM data to FPGA on imx7d, when I write data to EIM bus, some problems occur. My EIM bus data width is conf...
    其东 刘
    last modified by 其东 刘
  • RT1020 - Fuse shadow registers

    Hi,   I just want to confirm some things regarding the OCOTP shadow registers please:   1. Can I just read and write to the OCOTP shadow registers (0x401F4400 - 0x401F46F0) at will, and the efuse...
    rshipman
    last modified by rshipman
  • PWM with multiple period using LPC546xx SCTimer/PWM

    Hello ,   I am using LPC54628(OM13098) development board. I intent to use PWM output with different period. Is it possible to have different PWM period in SCT0?   e.g. SCT0_OUT4     ...
    Hemanth S
    last modified by Hemanth S
  • RT1020 - BEE decrypt on the fly on FlexSPI secondary pinmux?

    Hi.   Does the RT1020 support BEE decrypt-on-the-fly xip for FlexSPI NOR flash routed to the secondary pinmux?   Thanks and regards, Ronnie
    rshipman
    last modified by rshipman
  • RT1020 - Why is SION (Software Input On) required?

    Hi,   Why do we need to set SION (Software Input On) for the following signals (and maybe others) please?   1. ENET_REF_CLK 2. SEMC_DQS 3. LPI2Cn_SCL 4. LPI2Cn_SDA   Many thanks and regards, Ronnie
    rshipman
    last modified by rshipman
  • I Get Hardfault On Custm Board

    Hello ı am using Mcuxpresso 11.1.1  and MIMXRT 1052 on custom board. Sdk: SDK_2.7.0_MIMXRT1052xxxxB. I tried to modify sdcard_fatfs example and it worked but when ı create a new project and tried the same co...
    Omer Kaan Basakinci
    last modified by Omer Kaan Basakinci
  • about security

    Hello ,           Today I found a problem ablout S32K146 device security.                       if the WRITE_PRO...
    kui wu
    last modified by kui wu
  • RT1020: How long is a wait state (e.g. GPIO, GPT peripherals)?

    Hi,   Regarding document: i.MX RT1020 Processor Reference Manual, Rev. 1, 12/2018   What does it mean by a wait state? Is this a single cycle of the peripheral’s root clock, the periph clock, processor...
    rshipman
    last modified by rshipman
  • S32K can't wake up from VLPS occasionally

    hi,     i"m using the s32k142 with RUN mode and VLPS mode, through the GPIO interrupt to wake up the chip from VLPS mode, it's working fine in most of times,but there is a slight chance that can't...
    ww ww
    last modified by ww ww
  • SE050: key rotation: DoAPDUTxRx_s_Case4 returns 0x6a80

    Hi all,   I am running the sample code from SE05X Rotate PlatformSCP Keys Demo on the SE050 ARD board (OEFID = 6). I am using simw-top version 2.14.   The APDU request from the sample code returns 0x6...
    Jorge Ramirez Ortiz
    last modified by Jorge Ramirez Ortiz