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K20 ADC with DMA

Question asked by ULF PAMBOR on Oct 17, 2011
Latest reply on Oct 18, 2011 by Konrad Anton

Folks,

 

we have trouble to get the K20 configured correctly with ADC and DMA.

 

Our idea is quite easy explained: We want  i.e 10 consecutive samples of ADC0 (triggered by PDB) to be stored in 10 consecutive memory locations (32 bits)  by DMA. After the 10th conversion we want to get an interrupt to start some CPU action. 

 

Our ADC is running properly and triggering by PDB also works fine.

 

We now have tried to get one sample to be converted and transferred by DMA for testing, but the DMA wil never be triggered...

 

The ADC configuration is

 

  ADC0_CFG1 = ADC_CFG1_ADIV(0x3) | ADC_CFG1_MODE(0x1) | ADC_CFG1_ADICLK(0x1);

  ADC0_CFG2 = ADC_CFG2_ADLSTS(0x2);

  ADC0_SC2 = ADC_SC2_ADTRG_MASK | ADC_SC2_DMAEN_MASK ;

  ADC0_SC3 =  ADC_SC3_AVGS(0x0);

  ADC0_SC1A = /*ADC_SC1_AIEN_MASK |*/ ADC_SC1_ADCH(26);

  ADC0_SC1B = /*ADC_SC1_AIEN_MASK |*/ ADC_SC1_ADCH(26);

 

The DMA and DMA mux configuration is like that:

 

  SIM_SCGC6 |= SIM_SCGC6_DMAMUX_MASK;

  SIM_SCGC7 |= SIM_SCGC7_DMA_MASK;

  DMA_CR = 0;

  DMA_SERQ = 0x1;

  DMA_CERR = 0x40; //Clear all errors

  DMA_DCHPRI0 = 0;

  DMA_TCD0_SADDR = (uint32_t)&ADC0_RA;

  DMA_TCD0_SOFF = 0;

  DMA_TCD0_ATTR = 0x202; //Source and destination size 32bit, no modulo

  DMA_TCD0_NBYTES_MLNO = 0x4;

  DMA_TCD0_NBYTES_MLOFFNO = 0x4;

  DMA_TCD0_NBYTES_MLOFFYES = 0x4;

  DMA_TCD0_SLAST = 0;

  DMA_TCD0_DADDR = (uint32_t)&adc_dma;

  DMA_TCD0_DOFF = 0x4;

  DMA_TCD0_CITER_ELINKYES = 0x1;

  DMA_TCD0_CITER_ELINKNO = 0x1;

  DMA_TCD0_DLASTSGA = 0;

  DMA_TCD0_BITER_ELINKYES = 0x1;

  DMA_TCD0_BITER_ELINKNO = 0x1;

  DMA_TCD0_CSR = 0xA;

 

  DMAMUX_CHCFG0 = 0;

  DMAMUX_CHCFG0 = 40 | 0x80; //Set DMA Channel0 to ADC0 and enable

 

Any idea, what we are doing wrong ?

 

Any support is welcome. Thanks in advance.

 

Regards, Ulf 

 

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