AnsweredAssumed Answered

PCIe addresses

Question asked by Chiang Tan on Oct 5, 2011
Latest reply on Oct 25, 2011 by Chiang Tan

Hi there,


I managed to compile and load pex_digital_loopback demo (CW 10.2) to my 8156 EVM. Everything works fine and I got a "Test passed" message at the end of the program.


What I don't know is which bit of memory space is written to in this loopback demo, i.e. internal or PCIe memory space? Here are the addresses used, but without information on what they correspond to.


#define OUTBOUND_1_BASE              0xa0000000
#define OUTBOUND_2_BASE              0xa1000000

#define OUTBOUND_1_TRANS             0xb0000000
#define OUTBOUND_2_TRANS             0xb1000000

#define INBOUND_1_BASE               0xb3000000
#define INBOUND_BASE                OUTBOUND_2_TRANS
#define INBOUND_TRANS                0x80000000


Just to confirm, is there actually a loopback interface for PCIe on the EVM for testing?


Would really appreciate if someone can help explain what exactly is going on in this demo. As I think understanding the addressing above will help me interface the EVM to an external FPGA board.


Thank you in advance.