Kirill Dan

Receiving SWITE, NWRITE SRIO transactions with MSC8156 processor

Discussion created by Kirill Dan on Jul 15, 2011
Latest reply on Jun 1, 2012 by jie yang



I have a problem with receiving SWRITE, NWRITE  RapidIO transactions from remote srio controller(Xilinx FPGA SRIO IP controller). We've already achieved correct transmition SWRITE, NWRITE packets to FPGA, but when we transfer the same types of packets back to DSP, DSP shows no action. Be more precise, I could not see any data coming from FPGA. Could it be that DSP SRIO controller should only send NREAD transaction, and after that FPGA's controller could response with requested data and FPGA controller could not initiate write operation(if FPGA want to send something it should wait NREAD and only after that send)?


Thank you!