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GPIO Open Drain: Schematic?

Question asked by Chris Belsky on Jul 11, 2011
Latest reply on Jul 12, 2011 by Mark Butcher



In the Kinetis K60 uP, the general-purpose-input-output (GPIO) port register PORTx_PCRn, bit ODE called "Open Drain Enable" allows the port to be configured with an "Open Drain Output".  Could anyone please explain to me what the significance of Open-Drain is?  Schematically speaking, what does the port look like with the "Open Drain" enabled vs. disabled?  I'm trying to understand when an application would want an Open-Drain output vs. a non-open-drain. 


Thanks and regards,