MQX with Processor Expert enabled BSP - CDC Virtual COM demo - device will not enumerate

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MQX with Processor Expert enabled BSP - CDC Virtual COM demo - device will not enumerate

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niroc
Contributor II

The USB CDC Virtual COM demo (cdc_vcom_twrk40x256) that ships with MQX 3.7 stops working (device will not enumerate) as soon as MQX 3.7 is updated to use the Processor Expert Logical Level Device Driver enabled BSP (bsp_twrk40x256_pe) instead of the default BSP (bsp_twrk40x256).

 

My configuration:

Operating System: Windows XP SP2 

                       IDE: CodeWarrior 10.1

                   RTOS: MQX 3.7

 

After a clean installation of CW 10.1 and MQX 3.7...

 

Steps to reproduce USB CDC device enumeration problem:

  1. Verify that the CDC Virtual COM demo (cdc_vcom_twrk40x256) works.
  2. Import and rebuild bsp_twrk40x256_pe and psp_twrk40x256.
  3. Rebuild cdc_vcom_twrk40x256.
  4. Verify that the CDC Virtual COM demo no longer works (device will not enumerate).

I did a clean build of all MQX libs and the device will still not enumerate.

 

bsp_twrk40x256_pe

psp_twrk40x256

mfs_twrk40x256

rtcs_twrk40x256

shell_twrk40x256

usb_ddk_twrk40x256

usb_hdk_twrk40x256

 

Any ideas?

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petr_uhlir
NXP Employee
NXP Employee

The CPU component in Processor expert does not set the USB to be clocked from PLL as required by MQX USB IO driver.

So if you replace the _bsp_usb_io_init  function in init_gpio.c by the following one it will work for both PE and non PE BSPs.

The same patch is valid also for TWR-K60N512 BSP.

 

_mqx_int _bsp_usb_io_init

(

    void

)

{

#if PE_LDD_VERSION

    /* USB clock is configured using CPU component */

   

    /* Check if peripheral is not used by Processor Expert USB_LDD component */

     if (PE_PeripheralUsed((uint_32)USB0_BASE_PTR) == TRUE) {

         /* IO Device used by PE Component*/

         return IO_ERROR;

     }

#else

    /* Configure USBFRAC = 0, USBDIV = 1 => frq(USBout) = 1 / 2 * frq(PLLin) */

    SIM_CLKDIV2_REG(SIM_BASE_PTR) &= SIM_CLKDIV2_USBFRAC_MASK | SIM_CLKDIV2_USBDIV_MASK;

    SIM_CLKDIV2_REG(SIM_BASE_PTR) |= SIM_CLKDIV2_USBDIV(BSP_USB_DIV) | BSP_USB_FRAC;

 

#endif

 

    /* Configure USB to be clocked from PLL */

    SIM_SOPT2_REG(SIM_BASE_PTR) |= SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK;

   

    /* Enable USB-OTG IP clocking */

    SIM_SCGC4_REG(SIM_BASE_PTR) |= SIM_SCGC4_USBOTG_MASK;

   

    /* USB D+ and USB D- are standalone not multiplexed one-purpose pins */

    /* VREFIN for device is standalone not multiplexed one-purpose pin */

 

#if BSP_USB_TWR_SER2

    /* TWR-SER2 board has 2 connectors: on channel A, there is Micro-USB connector,

    ** which is not routed to TWRK40 board. On channel B, there is standard

    ** A-type host connector routed to the USB0 peripheral on TWRK40. To enable

    ** power to this connector, GPIO PB8 must be set as GPIO output

    */

    PORT_PCR_REG(PORTB_BASE_PTR, 8) = PORT_PCR_MUX(0x01) | PORT_PCR_PE_MASK;

    GPIO_PDDR_REG(PTB_BASE_PTR) |= 0x00000100; // PB8 as output

    GPIO_PDOR_REG(PTB_BASE_PTR) |= 0x00000100; // PB8 in high level

#endif

   

    return MQX_OK;

}

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MVa
NXP Employee
NXP Employee

Verify the USB clock frequency in the CPU component. See" CPU component \ Clock configurations \ Clock configuration 0 \ System clocks \ PLLFLL clock selection \ USB clock settings \ USB clock". USB module requires 48 MHz clock .

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niroc
Contributor II

The clock settings are set correctly. Seet attached screenshot of my settings. I did not modify these settings at all after a clean install of MQX 3.7, which means the settings in my screenshot represent the settings that ship with MQX 3.7.

 

I contacted a Freescale rep. and received the following as the reply:

 

"Have Robotronics run the demo file in C:\Program Files\Freescale\Freescale MQX 3.7\usb\device\examples\cdc\virtual_com\cw10 When run, they will be asked to install a .inf file for the CDC.  It’s in C:\Program Files\Freescale\Freescale MQX 3.7\usb\device\examples\cdc\virtual_com\inf Run both the P&E Terminal Program (which reports status) and open a terminal program (Hyperterm, PuTTY, TerraTerm) using the COM port assigned by Windows."

 

The P&E Terminal is not necessary to successfully run the CDC demo (cdc_vcom_twr40x256) using the default BSP and

attaching the P&E Terminal to the USB COM to monitor status didn't help solve the problem when using the Processor Expert enabled BSP. The P&E Terminal reported no status while flashing the processor or when attempting to enumerate the tower module as a CDC USB device.

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petr_uhlir
NXP Employee
NXP Employee

The CPU component in Processor expert does not set the USB to be clocked from PLL as required by MQX USB IO driver.

So if you replace the _bsp_usb_io_init  function in init_gpio.c by the following one it will work for both PE and non PE BSPs.

The same patch is valid also for TWR-K60N512 BSP.

 

_mqx_int _bsp_usb_io_init

(

    void

)

{

#if PE_LDD_VERSION

    /* USB clock is configured using CPU component */

   

    /* Check if peripheral is not used by Processor Expert USB_LDD component */

     if (PE_PeripheralUsed((uint_32)USB0_BASE_PTR) == TRUE) {

         /* IO Device used by PE Component*/

         return IO_ERROR;

     }

#else

    /* Configure USBFRAC = 0, USBDIV = 1 => frq(USBout) = 1 / 2 * frq(PLLin) */

    SIM_CLKDIV2_REG(SIM_BASE_PTR) &= SIM_CLKDIV2_USBFRAC_MASK | SIM_CLKDIV2_USBDIV_MASK;

    SIM_CLKDIV2_REG(SIM_BASE_PTR) |= SIM_CLKDIV2_USBDIV(BSP_USB_DIV) | BSP_USB_FRAC;

 

#endif

 

    /* Configure USB to be clocked from PLL */

    SIM_SOPT2_REG(SIM_BASE_PTR) |= SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK;

   

    /* Enable USB-OTG IP clocking */

    SIM_SCGC4_REG(SIM_BASE_PTR) |= SIM_SCGC4_USBOTG_MASK;

   

    /* USB D+ and USB D- are standalone not multiplexed one-purpose pins */

    /* VREFIN for device is standalone not multiplexed one-purpose pin */

 

#if BSP_USB_TWR_SER2

    /* TWR-SER2 board has 2 connectors: on channel A, there is Micro-USB connector,

    ** which is not routed to TWRK40 board. On channel B, there is standard

    ** A-type host connector routed to the USB0 peripheral on TWRK40. To enable

    ** power to this connector, GPIO PB8 must be set as GPIO output

    */

    PORT_PCR_REG(PORTB_BASE_PTR, 8) = PORT_PCR_MUX(0x01) | PORT_PCR_PE_MASK;

    GPIO_PDDR_REG(PTB_BASE_PTR) |= 0x00000100; // PB8 as output

    GPIO_PDOR_REG(PTB_BASE_PTR) |= 0x00000100; // PB8 in high level

#endif

   

    return MQX_OK;

}

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