I am using MCS08SG8 ADC in 10 bit and continuous conversion mode. I am facing certain issue while reading ADCR register only when the value is 0xFF. I found that whenever the analog voltage is 2.5V i.e. ADCR value is 0xFF, it is found that if the voltage varies by a few bits i.e 254 to 257, the ADCR register sometimes shows a few transients i.e. ADCR value becomes either 0 or HIGH. This behaviour is reported only at 2.5V and not at any other voltage. What could be the reason behind this s/w or h/w. I even tried using long sample time, but the issue continued to crop up even then.
Regards,
KIRTI
Hello KIRTI,
Firstly, I assume that you have a Vdd of 5.0 volts. In addition to JimD's response, the low register ADCRL contains the lower eight bits of the 10-bit result. As the input voltage is varied between zero and 5.0 volts, the register value will ramp from 0x00 to 0xFF. It will then immediately step to 0x00, and again proceed to ramp. This will happen four times over the full 10-bit range, including the input level of 2.5 volts..
The ADCRH register will contain the upper two bits of the 10-bit result, right justified. Therefore, the register value will vary between 0x00 to 0x03. At 2.5 volt input, the transition will be from 0x01 to 0x02, i.e. 0x01FFF to 0x0200 for the full ten bits.
Regards,
Mac
First of all, ADCR represents the 10 bit register in this case.Also I have connected a potential divider to the input going to the Analog pin thus 5V correspond to 0x1FF and 2.5V coreespond to 0x0FF.The mentioned behaviour was observed to occur only at boundary condition that is when analog voltage is around 2.5V i.e 0x0FF. Could you please suggest what could be the reason behind. Also it is found that the frequency of the randomness decreases with when the device is used in long sample time mode.
Regards,
Kirti
You should check erratas. For S08DZ32, there's SE157-ADC-INCORRECT-DATA, which may explain your problem. The problem appears when you a reading data register at the same time when new ADC conversion ends. You may need to use interrupts to ensure old ADCR is read far enough in the time from the end of the new conversion.
Hello,
The errata appears to apply to a one cycle timing window only, so this condition should not happen very frequently. Why is it necessary to use continuous conversion mode? The errata condition cannot occur using single conversion mode.
I would mostly use single conversion mode, and wait for conversion complete using either polling or interrupts. The 16-bit ADCR read to get the ADC result may then occur, and the next conversion started. Very few applications should require the use of continuous conversion. In fact, if measuring more than one ADC channel, single conversion mode must be used.
If you need more accurately timed spacing between conversions, you can alternatively use a timer interrupt to determine when the previous conversion is read, and the next conversion started. Here, the ADC interrupt would not be used.
Regards,
Mac
If ADCR is an 8 bit register, then perhaps you need to look at the upper 2 bits of your 10 bit value.
255=0xff 256= 1 0x00 257 = 1 0x02