Rob Platt

MCF5475 FEC transmit hang

Discussion created by Rob Platt on Apr 26, 2011
Latest reply on May 25, 2011 by Rob Platt

Using the MCF5475 with Ethernet for a while, design is pretty stable.

The problem appears related to heavy transmit stress:


the Ethernet transmit stops, the HW FIFO fills, the 'ALARM" to the DMA is cleared, then naturally the DMABD ring fills and the Application notices.

The Ethernet doesn't recover from this state.


Receive is still working.


A full reset of our SW (and reinitialization of the ethernet controller + PHY) of course recovers, but I would like to find a more graceful recovery.


I believe the DMA is working fine, it has simply stopped because the Tx HW FIFO is full.

(Steady state of the FIFO would be empty: TLRFP==TLWFP==TFRP==TFWP)


EIR      00000000       
EIMR     f83e0000       
ECR      f0000002       
RCR      05ee0006       
TCR      00000000       
FECTFWR  00000003       
FECTFAR  00000100    
TX fifo:     
FECTFSR  40080000    
FECTFCR  0f240000    

FECTLRFP 0000015f    
FECTLWFP 00000144    
FECTFRP  00000164    
FECTFWP  00000144    

I can manually empty the FIFO by reading the TFDR with the debugger, so it appears the FIFO itself is working fine.


TXW is asserted, but the device errata indicates this is a nuisance, and the interrupt should be masked (It is), because it gets asserted by colissions, and WOULD stop the whole ethernet.


datecodes all XXX0837 and newer,

(I have only seen the old datecodes affected by the device errata on eval boards that still say "Motorola" on them)


any hints gladly appreciated