9S12DG128 - Timings and Auto Baud Rate

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9S12DG128 - Timings and Auto Baud Rate

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cb_nat
Contributor I

Hello to All

 

I am designing my own interface for reading and writing to various Freescale MCU's. I've read and written to '908' etc devices for many years with my own interface.

 

Now I would like to make my own project hardware/software to read/write 912D60, 912B32 and 9S12DG128 devices via BDM.

 

All the required commands are published in many tech bulletins on the internet but what I cannot find is any information regarding timings. In particular the required timings for establishing an auto baud rate connection.

 

Can anyone point me towards a publication/paper?

 

Many Thanks

 

Carl...

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kef
Specialist I

Old non-S12 devices like 912D, 912B, 812A don't have SYNC "command" and thus autobaudrate selection is tricky. It may be simplier to determine crystal/oscilator frequency and setup baudrate by hand. If you know what device you are talking to, you may try to write some longer pattern to device RAM and verify it at different baud rates.

S12 devices have not only SYNC (SYNC — Request Timed Reference Pulse), which helps determining bitrate; but also PARTID register, which helps determining what part you are talking to.

 

All documentation is in datasheets. For 912D60A see datasheet Section 19 Development Support. For 9S12C see Chapter 6
Background Debug Module (BDMV4) Block Description. For older 9S12D devices with different chapters in different PDFs - Background Debug Module (BDM) V? (S12BDMV?.pdf).

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cb_nat
Contributor I

Huge thanks for the pointer, lots of reading ahead I think. :smileyhappy:

 

Huge Thanks


Carl

 

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cb_nat
Contributor I

We have studied the 912D60A datasheet (a good starting point I think) and no exact baudrate is mentioned within. Could I ask if anyone knows the correct baud rates to use for this device when using the followg Xtal(s).

 

912D60A

16MHz = ?baud?

8MHz = ?baud?

4MHz = ?baud?

 

Many thaks in advance for any help.

 

Regards

 

Carl

 

 

 

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kef
Specialist I

Out of reset BDM clock is oscilator clock/2. If look at BDM bit timing diagram, you will see that one bit takes 16 BDM clock cycles. So max BDM throughput with 16MHz oscilator is 16MHz/2/16 = 500k bits per second

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