Daniele Vismara

/TA and /CS timing for MCF5329

Discussion created by Daniele Vismara on Nov 5, 2010
Latest reply on Nov 12, 2010 by TomE

We are developing a new system based on ColdFIre MCF5329 that will be interfaced with two TI DSP with HPI interface and with a compact flash. We have a problem to understand the FlexBus timing related to /TA and /CS signals.

 

When /TA is recognized as low, the /CS is negated by processor the next clock rising edge? Or the rising edge of clock after /TA is negated? In other words, the ColdFire CPU wait the rising edge of /TA to negate /CS or always negate /CS the cycle after /TA is sampled low?

 

There is any difference between auto acknowledge enable and disable when we use /TA to terminate the access for both of them?

 

Thanks!

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