TomE

MCF5xxx USB EHCI USBINR Reg Ref Manual bug

Discussion created by TomE on Sep 18, 2010
Latest reply on Sep 21, 2010 by Tom Thompson

There may be a minor problem in the current Revision 3 MCF5329 Reference Manual. A quick check shows the same problem in the MCF5329, MCF5373, and MCF52277 manuals at least, so it looks like the manuals for all Coldfire chips with USB EHCI controllers might be affected.

 

For the MCF5329, the problem can be seen by comparing the following sections and tables:

 

1 - 21.3.3.2 USB Status Register (USBSTS) Figure 21-16. USB Status Register (USBSTS)

2 - 21.3.3.3 USB Interrupt Enable Register (USBINTR) Figure 21-17. USB Interrupt Enable Register (USBINTR)

 

Figure 21-17 looks to have been copy/pasted from Figure 21-16. The "SLI SRI URI AAI SEI FRI PCI UEI UI" bits in USBSTS are "write one to clear" bits and are marked "w1c". This is correct.

 

The "SLE SRE URE AAE SEE FRE PCE UEE UE" bits in the USBINTR register are ALSO marked as "w!c" (cut & paste?). These bits are all read-write and not "write one to clear". Checking the Intel EHCI specification confirms this:

 

- http://www.intel.com/technology/usb/download/ehci-r10.pdf

Outcomes