Chinmay Chowkar

MCF54455 Power up sequence

Discussion created by Chinmay Chowkar on Jul 16, 2010
Latest reply on Sep 9, 2010 by TomE
Hello We are using MCF54455 processor in our new design. The power supply sequencing IC used in M54455 evalaution board is not available and has a 20 weeks lead time. The datasheet of processor mentions following " 3.3.1 Power-Up Sequence If EVDD/SDVDD are powered up with the IVDD at 0 V, the sense circuits in the I/O pads cause all pad output drivers connected to the EVDD/SDVDD to be in a high impedance state. There is no limit on how long after EVDD/SDVDD powers up before IVDD must power up. The rise times on the power supplies should be slower than 50 V/millisecond to avoid turning on the internal ESD protection clamp diodes." 3.3.2 Power-Down Sequence If IVDD/PVDD are powered down first, sense circuits in the I/O pads cause all output drivers to be in a high impedance state. There is no limit on how long after IVDD and PVDD power down before EVDD or SDVDD must power down. There are no requirements for the fall times of the power supplies. Is there any specific power-up and power down sequence to be followed while using other power supply IC's? Regards Chinmay

Outcomes