I am configuring our application's HRCW.
We have flash resident from 0xFC000000 through 0xFFFFFFFF on the 60x bus.
60x Address lines A6 through A28 go directly to flash. A6 through A16 go nowhere else.
Our FAE told me that the HRCW location will be at the lowest addresses of flash. The implication is that on reset the processor reads the HRCW with A6 through A24 low, and our HRCW should be read from 0xFC000000. This is not what I am seeing. To get the proper reset config I need to program the HRCW at 0xFE000000. What's programmed at 0xFC000000 has no effect whatsoever. The implication is that A7 through A16 are low during the HRCW get, but A6 is high. I've tried it on more than one processor board, and they all behave this way. I have also determined that A6 is NOT stuck, since the processor can correctly resolve different values programmed at locations whose addresses differ only in A6.
Is this an expected (i.e., documented) behavior for HRCW in 8270 ??