I've been playing with DMA transfers and I can quite happly move data from memory to memory. My problem is moving data from memory to peripherals.
I'm using Processor Expert Init_DMA to set everything up and if specify the source as (uint8)&MemorySource and the destination as (uint8)&MemoryDestination, with a 1 byte transfer then this works fine.
If however, I change the destination to (uint8)&PWMDTY2 for example (I've tried others) then the transfer fails with a BED error in DSR2 -> "The DMA channel terminated with a bus error during the write portion of a transfer."
Now in the 52259 Ref Manual, 220.127.116.11 gives " If the transfer is from memory to a peripheral device, DARn is loaded with the address of the peripheral data register. This address can be any aligned byte address."
Unfortunately, I'm not sure what it means by aligned byte address. Can anyone enlighten me?
Thanks in advance - Colin