AnsweredAssumed Answered

[mc9s12xs128] Doubt regarding simultaneous trigger of two timer i/p capture signals at the same time

Question asked by yadunandan kasu on Apr 6, 2010
Latest reply on Apr 13, 2010 by yadunandan kasu

Dear everyone, 

 

I am working with some application(mc9s12xs128) on which i have to use to two timer channels of ECT as input capture (say I use Timer Ch0, Timer Ch1) for two different continuous signals. And I use the trigger as 'capture on falling edge only'. The thing is when ever the falling edge occurs on any of these signals, I need to capture the time to some global variable from the respective Timer channel counters i.e. TC0, TC1 in this case.

 

But my doubt is what if the falling edge occurred on both the signals at the same time ? In this cases, I'm thinking either of the following two cases can happen. Please suggest me which one of the following two is correct.

 

Case:1

---------

1. First, CPU latches counter value (TCNT) to both channel counters TC0, TC1

2. Secondly then TC0 isr will execute as it has high priority than TC1.

3. Thirdly, TC1 isr will execute.

 

(or)

 

Case:2

----------

1. First, TC0 isr will execute after latching the TCNT value to TC0 counter.

2. Secondly, after completing TC0 isr, TC1 isr will execute after latching the TCNT value to TC1 counter.

 

If the Case:1 is correct, then may be that is not a problem for me.. Because i will have time. Otherwise if Case:2 is correct, i might loose the data of TC1 timer.

 

But anyway, if there is any other way, that i can successfully latch time at each falling of signal for the both the signals. I kindly request to please suggest me. Your experience can help me alot. Please find the my signal samples in the attachment.

 

Thank you

nandu

Outcomes