I am converting 32 commands of analog input through EQADC of MPC5566 controller. I am using 5th command FIFO and using EDMA channel 11 to transfer commands from user software command buffer to CFIFO 5 and configured sampling time as 8 ADC clock cycles. The clock used here is 144Mhz.
EDMA channel 12 is used to tranfer result from RFIFO 5 to software managed result queue.
I have observed that there is a mismatch in the storage of results at the correct location of software queue that has been set by user and this is occurring when result fifo overflow flag is set. I configured result overflow fifo overflow interrupt and adjusted or realigned the result queue. But I want to know what is the root cause for this. Can anybody help me to find the root cause for buffer mismatch?
Thanks in Advance,