Spurious interrupts when using _mcf52xx_int_mask from BSP

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Spurious interrupts when using _mcf52xx_int_mask from BSP

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jbezem
Contributor III
When using MQX/BSP to handle individual interrupt enbale/disable functionality,
we occasionally (between 5 and 72 hours from start) get a spurious interrupt,
indicating that an interrupt "disappears" between being detected and the end of
the IACK cycle.
We suspect that a disable interrupt is performed when the interrupt controller is
busy determining the actual vector to use, handling levels and priorities and such.
I took a look into the MQX source tree for 3.40 (we're still using 2.50, working
to go to 3.4 in due course, but there's no real difference) and saw that the BSP
functions to enable/disable individual interrupts, e.g. _mcf52xx_int_mask from
various BSP's, do not generally disable/enable interrupts to set/clear the
corresponding bits.
And since I couldn't find anything on this in the MQX docs (possibly doesn't belong
there), I'd thought to ask here: Isn't it necessary to disable interrupts before
setting/resetting the individual mask for a single interrupt source? Or at least
put a comment in the source that a caller is himself responsible for disabling
interrupts when such a function is called?
Take a look at, for instance, _mcf5227_int_mask in int_ctrl_mcf5227.c in the
standard MQX 3.40 distro. When called with a level lower than the interrupt level
of the interrupt being masked, a spurious interrupt might be generated.
A brief comment to that effect would have saved us quite some searching and
debugging.
Or am I overlooking something?

BR,

Johan
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PetrM
Senior Contributor I

You're right, there should be at least note or warning on this topic. We are sorry about it.

We found out this "spurious problem" around MQX 3.4 release and we were quite shocked too.

So there are two "solutions":

1) install dummy interrupt handler for spurious interrupt using _int_install_kernel_isr()

2) use _int_disable() and _int_enable() around each interrupt enable register bit clearing (disabling)

 

PetrM

 

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PetrM
Senior Contributor I

You're right, there should be at least note or warning on this topic. We are sorry about it.

We found out this "spurious problem" around MQX 3.4 release and we were quite shocked too.

So there are two "solutions":

1) install dummy interrupt handler for spurious interrupt using _int_install_kernel_isr()

2) use _int_disable() and _int_enable() around each interrupt enable register bit clearing (disabling)

 

PetrM

 

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jbezem
Contributor III

I actually inserted protection in both the mask and unmask functions of the BSP, like this:

    /* Save the status register and set the interrupt level to 7 (disable) */
     uSaveSR = _psp_get_sr();
     (void)_psp_set_sr(uSaveSR | 0x0700);

     mask = *maskr & ~clear;
     *maskr = mask & ~bit;

     /* Restore the previous value of the status register */
     (void)_psp_set_sr(uSaveSR);

 Maybe you can put that in MQX 3.5.

Thanks!

 

FWIW,

 

Johan

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