In various Freescale assembly language bootloader and flash programming files (i.e. doonstack.asm), there's a NOP instruction in the SpSub routine between writing and reading FSTAT. The comment on that line is "want min 4~ from w cycle to r".
I understand the need for a delay, but where does the number 4 come from, as in which spec? Does the 4 refer to Fclks, microseconds, something else? So far I haven't had any luck locating the actual required time between writing and reading FSTAT. I'm using a QE128, and I couldn't find any relevant info in there about this (just a reference to typical flash program time of 4 Fclks).