Gustavo Pimentel

Periodic Interrupt Timer Problem

Discussion created by Gustavo Pimentel on Sep 22, 2009
Latest reply on Oct 16, 2009 by Gustavo Pimentel

Hi,

 

on my code I have configured 4 PITs, they are working fine with the expected timming, but when I let the program running for a while the PIT stops requesting the interrupts, and the functions usleep and sleep enters on forever loop. I have comment the all the PIT code and I don't have any problem with my code execution, so I presume some errors on PIT code or on PIT interrupt.

 

Thanks for your help in advance.

 

Here is my code.

 

 

on clock source file:

 

void init_pit0(void)
{
  PITINTE|=0x01;  /* (PITMTLD+1)*(PITLD+1)/fbus */
  PITLD0=0xF423;  /* 256*62500*25ns=400ms */
  PITMUX|=0x00;
  PITCFLMT=0xA0;  /* Set the configuration registers before the PITE bit in the PITCFLMT register is set. Before PITE is set, the
                     configuration registers can be written in arbitrary order. */
}

void init_pit1(void)
{
  PITINTE|=0x02;  /* (PITMTLD+1)*(PITLD+1)/fbus */
  PITLD1=0x004E;  /* 256*79*25ns=505.6us */
  PITMUX|=0x00;
  PITCFLMT=0xA0;  /* Set the configuration registers before the PITE bit in the PITCFLMT register is set. Before PITE is set, the
                     configuration registers can be written in arbitrary order. */
}

void init_pit2(void)
{
  PITINTE|=0x04;  /* (PITMTLD+1)*(PITLD+1)/fbus */
  PITLD2=0x0F9F;  /* 1*4000*25ns=100us */
  PITMUX|=0x04;
  PITCFLMT=0xA0;  /* Set the configuration registers before the PITE bit in the PITCFLMT register is set. Before PITE is set, the
                     configuration registers can be written in arbitrary order. */
}

void init_pit3(void)
{
  PITINTE|=0x08;  /* (PITMTLD+1)*(PITLD+1)/fbus */
  PITLD3=0x9C3F;  /* 1*40000*25ns=1ms */
  PITMUX|=0x08;
  PITCFLMT=0xA0;  /* Set the configuration registers before the PITE bit in the PITCFLMT register is set. Before PITE is set, the
                     configuration registers can be written in arbitrary order. */
}

void enable_pit0(void){ PITCE|=0x01;}
void enable_pit1(void){ PITCE|=0x02;}
void enable_pit2(void){ PITCE|=0x04;}
void enable_pit3(void){ PITCE|=0x08;}

 

void enable_pit0(void){ PITCE|=0x01;}
void enable_pit1(void){ PITCE|=0x02;}
void enable_pit2(void){ PITCE|=0x04;}
void enable_pit3(void){ PITCE|=0x08;}

void disable_pit0(void){ PITCE&=(~0x01);}
void disable_pit1(void){ PITCE&=(~0x02);}
void disable_pit2(void){ PITCE&=(~0x04);}
void disable_pit3(void){ PITCE&=(~0x08);}

void usleep(UINT32 Time)
{
  SleepUsTick=0;
  while(SleepUsTick<Time){ W_DOG_Refresh(); asm(NOP);}
}

void sleep(UINT32 Time)
{
  SleepMsTick=0;
  while(SleepMsTick<Time){ W_DOG_Refresh(); asm(NOP);}
}

 

 

 

on main source file:

 

interrupt void PIT0_ISR(void)
{
  asm(MOVB #$01, PITTF);                         /* Write '1' to clear flag */
}

interrupt void PIT1_ISR(void)
{
  asm(MOVB #$02, PITTF);                         /* Write '1' to clear flag */
  STATUS2=!STATUS2;
}

interrupt void PIT2_ISR(void)
{
  asm(MOVB #$04, PITTF);                         /* Write '1' to clear flag */
  SleepUsTick+=100;
}

interrupt void PIT3_ISR(void)
{
  asm(MOVB #$08, PITTF);                         /* Write '1' to clear flag */
  SleepMsTick++;
}

Outcomes