we have just spend days trying go get the IIC module on the QG8 to work, with limited success unfortunately. The QG8 is master with a single slave on the "bus". Our code is not using the complicated interrupt mechanism as described in the application notes on this topic, I like to reserve interrupts for timing critical tasks. I want to keep the code as simple as possible, and sending 2-3 bytes to a peripheral should not require the use of interrupts. The SPI module sure doesn't. And the reference manual does not say so either.
The data sheet is confusing at best, and the application notes only rely on the interrupt approach, and I have yet to find a clear description of the meaning and interaction of the various bits.
There is nothing in the errata sheets of the mask set we're using, although after browsing the forum here the problems we are seeing seem to be common (IIC module locking up, waiting for the interrupt flag indefinitely, delays between register accesses, etc.)
These problems have been known for years (as evident by the posts in the forum), so I wonder why there is no solution to date. There would be several possibilities:
- If there is a problem with the IIC module, please admit it and put it in an updated errata sheet. It's not much work on behalf of FSL, and it can save your customers thousands of hours of accumulated work.
- If certain conditions (delays, dependencies, whatever) need to be considered, please put them in the data sheet or at least errata sheet.
- Does the customer really have to write a bit-bang driver to reliably shift 2-3 bytes out through the IIC bus when a dedicated module is available on the chip? If that is so, please mention this fact as well in the data sheet. We could have written 3 bit bang drivers in the time it has taken us to realize the various problems associated with the IIC on the QG8 (and other 9S08 IIC modules as well, from what can be read on the forum).
Maybe someone at Freescale reads this and finds the time to respond, I am sure many customers would appreciate this.