questions about mcf52211's clock module

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questions about mcf52211's clock module

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bluehacker
Contributor III

Hi all

I have some questions about mcf52211's clock module,hope you can geive me some explanations

1. the CLKMOD[1:0] Pins determine clock mode during POR, The 52211 reference manual says:

CLKMOD[1:0]    XTAL      Clocking Mode

00                    0           PLL disabled, clock driven by external oscillator

00                    1           PLL disabled, clock driven by on-chip oscillator

01                    N/A        PLL disabled, clock driven by external crystal

10                    0           PLL in normal mode, clock driven by external oscillator

10                    1           PLL in normal mode, clock driven by on-chip oscillator

11                    N/A        PLL in normal mode, clock driven by external crystal 

 my question is if I use MCF52211CAE66 (LQFP64 package), which has not CLKMOD1 pin, how about the clock mode during POR? for example if I connect CLKMOD0 pin to VCC33, what is the clock mode ?

 

2.The CCLR register select clock source, reference manual's table 6-11 says:

Table 6-11. CCLR[OSCSEL1] and CCLR[OSCSEL0] Settings

OSCSEL1 OSCSEL0         Source of PLL input/bypass clock

0            0                   Primary oscillator (default)

0            1                    Relaxation oscillator

1            0

                                  Secondary oscillator

1           1 

 my question is what is Primary oscillator and what is secondary oscillator?

 

thanks! 

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mjbcswitzerland
Specialist V

Hi

 

The CLKMOD pins have internal pull downs. This means that CLKMOD[1] will default to '0' when the pin is not available on the smaller package. The PLL will thus always be disabled by default.

 

Generally the default setting is not critical since the start-up code can immediately overwrite the setting.

 

I believe that the secondary oscillator is referring to the external oscillator but I don't remember using this mode, so can't be sure. Unfortunately the manual description of the OSCSEL1 bit doesn't seem to correspond to the table 6-11 so a test is probably the fastest way to be sure...

 

Regards

 

Mark

 

www.uTasker.com
- OS, TCP/IP stack, USB, device drivers and simulator for M521X, M521XX, M5221X, M5222X, M5223X, M5225X. One package does them all - "Embedding it better..."

 

 

 

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mjbcswitzerland
Specialist V

Hi

 

The CLKMOD pins have internal pull downs. This means that CLKMOD[1] will default to '0' when the pin is not available on the smaller package. The PLL will thus always be disabled by default.

 

Generally the default setting is not critical since the start-up code can immediately overwrite the setting.

 

I believe that the secondary oscillator is referring to the external oscillator but I don't remember using this mode, so can't be sure. Unfortunately the manual description of the OSCSEL1 bit doesn't seem to correspond to the table 6-11 so a test is probably the fastest way to be sure...

 

Regards

 

Mark

 

www.uTasker.com
- OS, TCP/IP stack, USB, device drivers and simulator for M521X, M521XX, M5221X, M5222X, M5223X, M5225X. One package does them all - "Embedding it better..."

 

 

 

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