James Murray

Register TMP1, TMP2, TMP3 - S12, S12X, 9S12XEP100

Discussion created by James Murray on May 15, 2009
Latest reply on May 15, 2009 by kef

I notice in S12XCPUV1.pdf that there are three 16 bit temporary registers in the CPU. These look to have been used by the now-removed fuzzy logic instructions.


The datasheet notes that "TMP2 and TMP3 are reserved."


Can these be used? If not, why not?

Even if there are forward portability issues, is there any problem in using them now on the 9S12XEP100 ?


I did a quick test through BDM and got inconsistent result:

ldd #$1234

tfr d,tmp1

ldd #$5555

tfr tmp1,d

std $3000


Setting PC to the start address and a breakpoint after the code, then running it worked and $3000 contains the value $1234 as expected.

However, singlestepping did NOT work, and D contains 00D0 at the end??


ldx #$1234

tfr x,tmp2

ldx #$5555

exg x,tmp2

stx $3000


Again, this works when running but BDM singlestepping clobbers tmp2 with PC.