Hi, everyone
How can I get information of CPU reset reason (for example, Watchdog Reset) in LS2088a?
I used devmem2 program to watch the Reset Request WDT status register, but I could not get the reset reason correctly.
Please give me an information, thanks in advance.
Reset value of the RSTRQWDTSRL is all zeroes.
The register value has to be inspected when RESET_REQ_B is asserted, but this assertion did not generate PORESET_B to the processor.
Thank you for reply.
After reset from watchdog timeout and reboot, I read the Reset Request WDT status register.
The value was all zeroes.
I think there was something wrong to my method for reading the Reset Request WDT status register.
Is it right that Reset request WDT status register has the reason bit after watchdog timeout reset and reboot?
> Is it right that Reset request WDT status register has the
> reason bit after watchdog timeout reset and reboot?
Not right.
During reset the register is cleared.