i.MX8MQ EVK: Failing to write SNVS registers from u-boot CLI

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i.MX8MQ EVK: Failing to write SNVS registers from u-boot CLI

1,148 Views
goescy
Contributor II

Hi all

 

I'm trying to access the SNVS registers from the interactive U-Boot CLI. Looking at the SNVS_HP Command Register (HPCOMR), I see field 31 as set and with this assume I should be able to access privileged registers:

 

u-boot=> md.l 0x30370004 1
30370004: 80002100

 

Then looking at the SNVS_LP Lock Register (LPLR), I see field 4 as not set and with this assume I should have write access to the monotonic counter and MC_ENV bit:

 

u-boot=> md.l 0x30370034 1
30370034: 00000000

 

Then looking at the SNVS_LP Control Register (LPCR) I see field 2 (MC_ENV) as not set and with this assume that the monotonic counter is disabled or invalid:

 

u-boot=> md.l 0x30370038 1
30370038: 00000020

 

Now I tried to enable the monotonic counter by setting this MC_ENV field of the LPCR register as follows:

 

u-boot=> mw.l 0x30370038 0x00000024

 

However, this has no effect:

 

u-boot=> md.l 0x30370038 1         
30370038: 00000020

 

What am I missing?

 

Many thanks,

 

Cyrill

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2 Replies

1,088 Views
goescy
Contributor II

Hi all

I finally managed to solve this issue. As per chapter 6.4.2.2 in [1], the power glitch detector register LPPGDR needs to be loaded with 0x4173_6166. Subsequently, the power glitch record in the LP status register LPSR needs to be cleared.

Good luck anyone.

Cyrill

[1]: https://www.nxp.com/webapp/Download?colCode=IMX8MDQLQRM 

1,088 Views
igorpadykov
NXP Employee
NXP Employee

Hi Cyrill

reason may be insufficient permissions which are handled in atf

imx8mq\imx\plat - imx-atf - i.MX ARM Trusted firmware 

Best regards
igor
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