Patrick Johnson

Bug Report - CADC Peripheral Configuration

Discussion created by Patrick Johnson on Jul 23, 2020
Latest reply on Jul 27, 2020 by Jing Pan

Project is for the KV46 device.  SDK version 2.8.0 (366 2020-07-21). 

 

Two typos found...

 

#1

There appears to be a typo in the fsl_cadc.h file for the zero crossing enumerations.  The 'Crossing" is misspelled as "Corssing" (lines 125 through 128).  This causes an error in the generated code when it populates the sample configuration structure in peripherals.c  In the auto-generated peripherals.c, the correct spelling is used (i.e. kCADC_ZeroCrossingDisabled).

 

typedef enum _cadc_zero_crossing_mode
{
    kCADC_ZeroCorssingDisabled          = 0U, /*!< Zero Crossing disabled. */
    kCADC_ZeroCorssingForPtoNSign       = 1U, /*!< Zero Crossing enabled for positive to negative sign change. */
    kCADC_ZeroCorssingForNtoPSign       = 2U, /*!< Zero Crossing enabled for negative to positive sign change. */
    kCADC_ZeroCorssingForAnySignChanged = 3U, /*!< Zero Crossing enabled for any sign change. */
} cadc_zero_crossing_mode_t;

 

#2

There appears to be a typo in the fsl_cadc.h file for the cadc_config_t typdef structure.  The 'DMATriggerSource" element is misspelled as "DMATriggerSoruce" (line 148).  This causes an error in the generated code when it populates the ADC configuration structure in peripherals.c  In the auto-generated peripherals.c, the correct spelling is used (i.e. .DMATriggerSource).

 

This typo also exists in fsl_cadc.c on line 153 and line 187.

 

typedef struct _cadc_config
{
    cadc_dual_converter_scan_mode_t dualConverterScanMode; /*!< Dual converter's scan mode. */
    bool enableSimultaneousMode;                           /*!< Using Simultaneous mode. */
    cadc_dma_trigger_source_t DMATriggerSoruce;            /*!< DMA trigger source. */
    cadc_idle_work_mode_t idleWorkMode;                    /*!< Converter's work mode when in idle. */
    uint16_t powerUpDelay; /*!< Delay clock count to wait for the clock is stable. Available range is 0-63.*/
} cadc_config_t;

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