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Question on i.MX6 LVDS setting

Question asked by t_kuha on Jul 14, 2020
Latest reply on Jul 19, 2020 by t_kuha

According to "39.5.1 Mapping of Input Data Busses" in Reference Manual of i.MX6 Quad, when using LVDS channel 1, DI0 in single channel mode is disabled.



The question is: what does this mean?

Does it mean when using LVDS ch1, only IPU*-DI1 can be used (and IPU*-DI0 is not usable)?


Best regards,