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MCU can't exit VLPS mode

Question asked by 罗 文 on Jul 9, 2020
Latest reply on Jul 26, 2020 by 罗 文

    We came across a problem that very much like the description of ERR011063 in the Mask Set Errata for Mask 0N57U, the platform we are using are S32K144 and TJA1169.


ERR011063: SMC: An asynchronous wakeup event during VLPS mode entry may
result in possible system hang scenario.
When the bus clock is same system clock and an asynchronous wakeup occurs during a mode
transition from RUN to VLPS or VLPR to VLPS, the MCU may hang in an undetermined state,
which can only be recovered by a power-on reset event or a watchdog reset.
Workaround: Before executing the transition to VLPS ensure that the PREDIV_SYS_CLK frequency /
BUS_CLK frequency configuration for RUN/VLPR mode is greater than or equal to 2.
For example: Assuming a PREDIV_SYS_CLK of 8 MHz and SCG_RCCR[DIVCORE] =
0b0001 (divider of 2) and SCG_RCCR[DIVBUS] = 0b0001 (divider of 1), (PREDIV_SYS_CLK
= 8 MHz) / (BUS_CLK = 4 MHz) , a ratio of 1:2.


    When we enter the VLPS mode, we only have two interrupts: Systick and LPTMR, since we think our LPTMR interrupt timing can never coincide with transition to VLPS, that leaves only Systick.


    So my question is are Systick one of the Asynchronous wakeup?


    Another issue, according to the workaround of the ERR011063, PREDIV_SYS_CLK / BUS_CLK need to have a value greater than or equal to 2, our current DIVCORE and DIVBUS are 2, that means PREDIV_SYS_CLK / BUS_CLK is 4.But since PREDIV_SYS_CLK only available in S32K148, dose that mean this error can still happen in S32K144?