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DDR Stress Test Fails at Density > 521MB

Question asked by Simon Willis on Jul 1, 2020
Latest reply on Jul 1, 2020 by Rita Wang

Hi All,

 

I have a new iMX6ULL board with a 512MBx16 DDR RAM chip (ISSI IS43TR16512B-125KBL). I am trying to use the RAM Stress Test tool over JTAG. I have built an init script, based on the EVK example (which has a 512MB DDR instead of 1GB on our board), but have increased the number of rows from 15 to 16. I have been able to load the RAM test script via JTAG (my USB is not yet working). If I run with a RAM density of 512MB or less, it passes fine. However, if I change the density to 1GB, it fails with the following message:

 

DDR Freq: 396 MHz

t0.1: data is addr test

Address of failure(step2): 0xa0000000

Data was: 0x9fffffe0

But pattern  should match address

Error: failed to run stress test!!!

If I turn off bank interleaving, it fails at this address:

 

DDR Freq: 396 MHz

t0.1: data is addr test

Address of failure(step2): 0x800000c0

Data was: 0x800000a0

But pattern  should match address

Error: failed to run stress test!!!

So it appears to me that this is corresponding with the high bit of the row. 

 

Does anyone have any ideas where I might be going wrong here? 

 

The RAM is setup in MMDC_MDCTL as follows:

w4 0x021B0000, 0x85180000 // [MMDC_MDCTL] MMDC Core Control Register
               // <31> SDE_0 , 1'b1: MMDC Enable CS0;
               // <30> SDE_1 , 1'b0: MMDC Enable CS1;
               // <26:24> ROW , 3'b101: set ROW Address Width, 3'b101 stands for 16bits Row;
               // <22:20> COL , 3'b001: set COL Address Width, 3'b001 stands for 10bits Column;
               // <19> BL , 1'b1: set Burst Length as 8;
               // <17:16> DSIZ , 2'b00: set DDR Data Bus Size as 16-bit;

 

Is there anything else I need to setup?

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