LPC55S69: Boot-Rom area attributes

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LPC55S69: Boot-Rom area attributes

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EugeneHiihtaja
Senior Contributor I

Hi !

I have active MPU on secure side and run out of section for cover all specific areas.

What kind of default memory attributes has Boot-Rom area. MPU cover it with privileged access right.

But typical executable area have the next memory attributes:

portMPU_NORMAL_MEMORY_BUFFERABLE_CACHEABLE

portMPU_REGION_NON_SHAREABLE
portMPU_REGION_PRIVILEGED_READ_ONLY

What about normal FLASH memory area attributes ? Are they by default the same ?

MPU default settings can keep those areas with privileged access right what is OK for me.

But If I not specify others, may be some performance penalty or some other degradation can happens.

In can see in FreeRTOS port for LPC, some area is covered explicitly with those attributes as well.

Can those code area stay as it is or extra MPU atrributes bring some required settings and/or benefits ?

Regards,

Eugene

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diego_charles
NXP TechSupport
NXP TechSupport

Hi Eugene,

 

 Thank you for your patience,

We could consider the Boot ROM and normal FLASH as normal memory for the MPU.

However, the definition of their attributes  for memory regions will depend on your application, this includes the privilege attribute.

Unfortunately ,we do not have specific examples to define a memory region in MPU for the BootROM for your reference.

 

If we check the prvSetupMPU() , from FreeRTOS port.c  we can see that already  5 MPU regions are defined for the kernel operation:

 

#define portPRIVILEGED_FLASH_REGION                                                                   ( 0UL )

#define portUNPRIVILEGED_FLASH_REGION                                                              ( 1UL )

#define portUNPRIVILEGED_SYSCALLS_REGION                                                       ( 2UL )

#define portPRIVILEGED_RAM_REGION                                                                       ( 3UL )

#define portSTACK_REGION                                                                                          ( 4UL )

                                                              

 

For example, privileged flash has the region 0 assigned. The attributes for  this specific Flash area are defined using the  RBAR register   of the MPU.

 

   portMPU_RNR_REG = portPRIVILEGED_FLASH_REGION;// equals to region number 0 of the MPU
       portMPU_RBAR_REG =    ( ( ( uint32_t ) __privileged_functions_start__ ) & portMPU_RBAR_ADDRESS_MASK ) |
                                ( portMPU_REGION_NON_SHAREABLE ) |   ( portMPU_REGION_PRIVILEGED_READ_ONLY );

 

By default the MPU blocks access to the  memory areas that are not explicitly configured on the MPU for any privileged or unprivileged program.

 

However, we can see that the last  sentence of the prvSetupMPU() function:

 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE | portMPU_ENABLE );

 Enables the MPU and  the PRIVDEFENA bit . The last bit will enable the access to the un-mapped

Memory areas to privileged privileged programs. For example, this means that a privileged function can access to SRAM areas that were not defined  on the MPU .

 

You could leave the five regions defined by FreeRTOS as they are. If we check closer only necessary attributes are granted for proper kernel operation.

 

I hope this helps

Regards,

Diego

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EugeneHiihtaja
Senior Contributor I

Hi Diego !

Thank you !

I think I can keep it as it is because PRIV_BACKGROUND is enabled  for MPU_S and SAU is not enable access to it from Nonsecure side.

Regards,

Eugene

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diego_charles
NXP TechSupport
NXP TechSupport

Hi Eugene,

I just wanted to let you know  that I am working to provide feedback on your inquiries.

Regards,

Diego.

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